Pinned Repositories
abc
ABC: System for Sequential Logic Synthesis and Formal Verification
Analog-Clock-IoT-NodeMCU-ESP8266-oled
keras-face
face detection, verification and recognition using Keras
LearnPython
以撸代码的形式学习Python
mobilenetv3-tensorflow
Unofficial implementation of MobileNetV3 architecture described in paper Searching for MobileNetV3.
myhdl
The MyHDL development repository
TongJoe
Config files for my GitHub profile.
verilog-lfsr
Fully parametrizable combinatorial parallel LFSR/CRC module
TongJoe's Repositories
TongJoe/abc
ABC: System for Sequential Logic Synthesis and Formal Verification
TongJoe/TongJoe
Config files for my GitHub profile.
TongJoe/myhdl
The MyHDL development repository
TongJoe/LearnPython
以撸代码的形式学习Python
TongJoe/Analog-Clock-IoT-NodeMCU-ESP8266-oled
TongJoe/mobilenetv3-tensorflow
Unofficial implementation of MobileNetV3 architecture described in paper Searching for MobileNetV3.
TongJoe/verilog-lfsr
Fully parametrizable combinatorial parallel LFSR/CRC module
TongJoe/keras-face
face detection, verification and recognition using Keras