Unike267

The silicon age. In our pockets 📱 In our brains 🧠 In our hearts 💕

Bizkaia

Pinned Repositories

Containers
Containers repository to build 🔨 and push 📤 containers in continuous integration ♻️
Language:Perl0 1 10
Ejercicios-Cosimulacion
Repositorio donde se mostrará los ejerciocios realizados para la asignatura "cosimulación para la verificación de sistemas sobre FPGAs".
Language:VHDL0 1 01
freejaus.github.io
Main web page
Language:HTML0 0 00
linux
Linux kernel source tree
Language:C0 0 00
MPPT
Diseño de una arquitectura para ejecutar un algoritmo MPPT sobre una placa solar
Language:Verilog0 1 01
MULT-LOGIC
Diseño y comprobación de un multiplicador de 6 bits
0 2 00
neorv32
🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Language:VHDL0 0 00
Photos
Finalidad: agrupar todas las imágenes utilizadas en el resto de repositorios.
0 0 00
Practices
This repo contains the work developed in the SIEAV Master practices 🎓✏️📚
Language:VHDL1 1 30
Thesis
⚠️ At the moment this repo is a DRAFT. We are landing the project. ✈️
Language:TeX00

Unike267/Practices
This repo contains the work developed in the SIEAV Master practices 🎓✏️📚
Language:VHDL1 1 30
Unike267/Containers
Containers repository to build 🔨 and push 📤 containers in continuous integration ♻️
Language:Perl0 1 10
Unike267/Ejercicios-Cosimulacion
Repositorio donde se mostrará los ejerciocios realizados para la asignatura "cosimulación para la verificación de sistemas sobre FPGAs".
Language:VHDL0 1 01
Unike267/freejaus.github.io
Main web page
Language:HTML0 0 00
Unike267/linux
Linux kernel source tree
Language:C0 0 00
Unike267/MPPT
Diseño de una arquitectura para ejecutar un algoritmo MPPT sobre una placa solar
Language:Verilog0 1 01
Unike267/MULT-LOGIC
Diseño y comprobación de un multiplicador de 6 bits
0 2 00
Unike267/neorv32
🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Language:VHDL0 0 00
Unike267/Photos
Finalidad: agrupar todas las imágenes utilizadas en el resto de repositorios.
0 0 00
Unike267/Thesis
⚠️ At the moment this repo is a DRAFT. We are landing the project. ✈️
Language:TeX00
Unike267/UNI
Repositorio de documentación técnica
0 0 00
Unike267/Unike267
https://orcid.org/0000-0002-4120-8313
1 0
Unike267/vunit
VUnit is a unit testing framework for VHDL/SystemVerilog
Language:VHDL