Pinned Repositories
Food_From_Home
An app used to buy and sell healthy home made food in the neighborhood!
Lane_detection_HW_FPGA
Implementation of a Hardware Accelerator for Lane-line detection on FPGA using Vivado HLS.
Memory-Subsystem
Implementation & testing of a memory subsystem with cache in Verilog
Pipelined_Processor
Implementation of RISC-V Pipelined processor in Verilog
VenkataAaditya0123's Repositories
VenkataAaditya0123/Pipelined_Processor
Implementation of RISC-V Pipelined processor in Verilog
VenkataAaditya0123/Food_From_Home
An app used to buy and sell healthy home made food in the neighborhood!
VenkataAaditya0123/Lane_detection_HW_FPGA
Implementation of a Hardware Accelerator for Lane-line detection on FPGA using Vivado HLS.
VenkataAaditya0123/Memory-Subsystem
Implementation & testing of a memory subsystem with cache in Verilog