/miniRv-1-CPU

CPU in miniRV-1

Primary LanguageVerilogGNU General Public License v3.0GPL-3.0

CPU Design

  1. lab1, simple risc-v asm lab running an a single cycle cpu.
  2. lab2, implementation of a single cycle cpu on miniRV-1.
  3. lab3, implementaion of a 5-stage pipeline cpu on miniRV-1.