WBChe

Master Student @ UESTC EE

University of Electronic Science and Technology of ChinaShenzhen, China

Pinned Repositories

brain-inspired-chip-test-system
test system for brain-inspired chip test system
Language:TeX00
btor2verilog
Hacked together program to convert btor2 files to Verilog.
Language:C++00
memory_test_model
This project builds a test model for memory chip test
Language:Verilog00
memory_test_model_host
Language:C00
pysmt
pySMT: A library for SMT formulae manipulation and solving
Language:Python00
smt-switch
A generic C++ API for SMT solving. It provides abstract classes which can be implemented by different SMT solvers.
Language:C++00
wasim-cpp
Language:C++00
WBChe
00
wbche.github.io
AcadHomepage: A Modern and Responsive Academic Personal Homepage
Language:SCSS00

WBChe's Repositories

WBChe/brain-inspired-chip-test-system
test system for brain-inspired chip test system
Language:TeX00
WBChe/btor2verilog
Hacked together program to convert btor2 files to Verilog.
Language:C++00
WBChe/memory_test_model
This project builds a test model for memory chip test
Language:Verilog00
WBChe/memory_test_model_host
Language:C00
WBChe/pysmt
pySMT: A library for SMT formulae manipulation and solving
Language:Python00
WBChe/smt-switch
A generic C++ API for SMT solving. It provides abstract classes which can be implemented by different SMT solvers.
Language:C++00
WBChe/wasim-cpp
Language:C++00
WBChe/WBChe
00
WBChe/wbche.github.io
AcadHomepage: A Modern and Responsive Academic Personal Homepage
Language:SCSS00