The Arancina (Autonomous RAM ANalysis CIrcuit for Not-broken Arrays) is a FPGA-based tool for testing the functionality of a DDR RAM, checking its characteristics and operating status through a series of test procedures.
The first prototype is built upon a Terasic DE0-Nano board, connected to an external DDR memory chip through a custom shield (DDRacula), and using an LCD display and a bunch of buttons as user interface.
The tool is still under heavy development and not ready for use.