WeiChungWu

HsinChu, Taiwan

Pinned Repositories

dotvim
my .vim setting
Language:Vim Script2 1 00
UVM_UART_Example
An UVM example of UART
Language:SystemVerilog14 1 39
vim-easygrep
Fast and Easy Find and Replace Across Multiple Files
Language:Vim script10
vim-SystemVerilog
SystemVerilog syntax highlight/indent support in vim
Language:Vim script49 9 518

WeiChungWu's Repositories

WeiChungWu/vim-SystemVerilog
SystemVerilog syntax highlight/indent support in vim
Language:Vim script49 9 518
WeiChungWu/UVM_UART_Example
An UVM example of UART
Language:SystemVerilog14 1 39
WeiChungWu/dotvim
my .vim setting
Language:Vim Script2 1 00
WeiChungWu/vim-easygrep
Fast and Easy Find and Replace Across Multiple Files
Language:Vim script10