Wissance/QuickRS232
A versatile full-duplex RS232 FPGA module with internal FIFO buffer on RX
VerilogApache-2.0
Issues
- 0
Add performance test
#11 opened by EvilLord666 - 1
Add tests on sending 0x00
#10 opened by EvilLord666 - 0
Create full buffered module
#9 opened by EvilLord666 - 1
Make quick_rs232 module testing in hw
#5 opened by EvilLord666 - 2
Add timeout
#6 opened by EvilLord666 - 1
Fix wrong number of data bits
#7 opened by EvilLord666 - 1
Use synchronous FIFO
#8 opened by EvilLord666 - 0
Add Xon-Xoff flow control support
#1 opened by EvilLord666 - 0
Add RS232 dynamic configuration
#2 opened by EvilLord666 - 0
- 0