Wolf-Tungsten

A CS PhD student in Institute of Computing Technology, CAS, University of Chinese Academy of Sciences.

University of Chinese Academy of Sciences.

Pinned Repositories

beezip
coming soon, and at this time: https://doi.org/10.5281/zenodo.10756036
Language:C0 1 00
chisel-vitis-template
Language:Scala8 2 13
dota-object-detection
DOTA数据集上的目标检测任务
Language:Jupyter Notebook4 1 00
minisys-rocket-chip
Wrapper for Rocket-Chip on FPGAs
Language:VHDL7 1 02
rocc-accelerator
毕设项目
Language:Verilog6 3 01
seu-catch-vcampus
煞笔的短学期Java大作业
Language:Java6 1 00
SEU-EnrollmentDataVisualization
东南大学学生处招生录取数据可视化
Language:JavaScript4 2 02
tungsten-web-boilerplate
使用React+Redux+React Router+Typescript+Ant Design构建的前端项目模板
Language:TypeScript5 2 00
wolf-silicon
大模型多智能体自动数字IC前端流程
Language:Python5 1 03
wolf-sim
A lightweight cycle-accurate system-level simulation framework
Language:C++7 1 01

Wolf-Tungsten's Repositories

Wolf-Tungsten/chisel-vitis-template
Language:Scala8 2 13
Wolf-Tungsten/wolf-sim
A lightweight cycle-accurate system-level simulation framework
Language:C++7 1 01
Wolf-Tungsten/tungsten-web-boilerplate
使用React+Redux+React Router+Typescript+Ant Design构建的前端项目模板
Language:TypeScript5 2 00
Wolf-Tungsten/wolf-silicon
大模型多智能体自动数字IC前端流程
Language:Python5 1 03
Wolf-Tungsten/SEU-EnrollmentDataVisualization
东南大学学生处招生录取数据可视化
Language:JavaScript4 2 02
Wolf-Tungsten/chisel-bitonic-sort
Bitonic Sort Implementation in Chisel
Language:Verilog3 2 01
Wolf-Tungsten/seu-compiler
Language:C++3 2 00
Wolf-Tungsten/hdlbits.01xz.net
每日一刷 hdlbits.01xz.net
Language:Verilog2 2 0
Wolf-Tungsten/herald-cms
herald-cms
Language:JavaScript2 1 01
Wolf-Tungsten/mpu-sim_distribution
Language:Python1 1 0
Wolf-Tungsten/opene906
OpenXuantie - OpenE906 Core
Language:Verilog1 0 0
Wolf-Tungsten/pp4fpgas
Parallel Programming for FPGAs -- An open-source high-level synthesis book
Language:TeX1 0 0
Wolf-Tungsten/Project-Zipline
Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
Language:Verilog1 0 0
Wolf-Tungsten/Project-Zipline-Alveo-U280
Project Zipline on Alveo U280 Board
Language:Verilog1 1 11
Wolf-Tungsten/seu-department-distributor
东南大学本科招生大类-院系自动分配工具
Language:JavaScript1 0 0
Wolf-Tungsten/tungsten-blog
狼剩子的博客项目
Language:Vue1 1 0
Wolf-Tungsten/beezip
coming soon, and at this time: https://doi.org/10.5281/zenodo.10756036
Language:C0 1 00
Wolf-Tungsten/ursa-website
Language:Handlebars0 2 00
Wolf-Tungsten/formalized-method-tool
Language:JavaScript2 0
Wolf-Tungsten/gzip-analyzer
Language:JavaScript1 0
Wolf-Tungsten/lixueqi-ursa.github.io
Language:HTML1 01
Wolf-Tungsten/NutShell
RISC-V SoC designed by students in UCAS
Language:Scala0 0
Wolf-Tungsten/nutshell-on-alveo-fpga
将果壳 RISC-V 处理器移植到 AMD Alveo 加速卡以用作加速器控制器
1 0
Wolf-Tungsten/ramulator
A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf
Language:C++0 0
Wolf-Tungsten/scastpy
A simple screencast receiver written by Python
Language:Python0 0
Wolf-Tungsten/seu-carl-webplus
东南大学系统结构实验室-Webplus 模板
Language:CSS1 0
Wolf-Tungsten/ticketingsystem
并发大作业，购票系统
Language:Java2 0
Wolf-Tungsten/wolf-rtl-collection
Sharing with you some RTL widgets for daily use, for ease of copying and pasting
Language:Verilog1 0
Wolf-Tungsten/zlib-profile
A massively spiffy yet delicately unobtrusive compression library.
Language:C0 0
Wolf-Tungsten/zstd
Zstandard - Fast real-time compression algorithm
Language:C0 0