Pinned Repositories
am-kernels
chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
chisel-template
MiBench2
MiBench ported for IoT devices
NutShell
RISC-V SoC designed by students in UCAS
RISC-V-Hardware-Dev-Env
riscv-tests
rocket-chip
Rocket Chip Generator
WorkingTime
XiangShan
Open-source high-performance RISC-V processor
Wwy111's Repositories
Wwy111/am-kernels
Wwy111/chisel-template
Wwy111/RISC-V-Hardware-Dev-Env
Wwy111/XiangShan
Open-source high-performance RISC-V processor
Wwy111/chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Wwy111/MiBench2
MiBench ported for IoT devices
Wwy111/NutShell
RISC-V SoC designed by students in UCAS
Wwy111/riscv-tests
Wwy111/rocket-chip
Rocket Chip Generator
Wwy111/WorkingTime