Pinned Repositories
01_all_series_quickstart
Part I videos: Quick Start from weidongshan's Linux video Tutorials
8-bits-RISC-CPU-Verilog
Architecture and Verilog Implementation of 8-bits RISC CPU based on FSM. 基于有限状态机的8位RISC（精简指令集）CPU（**处理器）简单结构和Verilog实现。
996.ICU
Repo for counting stars and contributing. Press F to pay respect to glorious developers.
awesome-dv
Awesome ASIC design verification
caffe
Caffe: a fast open framework for deep learning.
cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
darkriscv
opensouce RISC-V implemented from scratch in one night!
Digital-System-Design
ECE 319 at Lehigh
e200_opensource
The Ultra-Low Power RISC Core
FPGA
FPGA
XudongXiao97's Repositories
XudongXiao97/awesome-dv
Awesome ASIC design verification
XudongXiao97/FPGA
FPGA
XudongXiao97/01_all_series_quickstart
Part I videos: Quick Start from weidongshan's Linux video Tutorials
XudongXiao97/8-bits-RISC-CPU-Verilog
Architecture and Verilog Implementation of 8-bits RISC CPU based on FSM. 基于有限状态机的8位RISC（精简指令集）CPU（**处理器）简单结构和Verilog实现。
XudongXiao97/996.ICU
Repo for counting stars and contributing. Press F to pay respect to glorious developers.
XudongXiao97/caffe
Caffe: a fast open framework for deep learning.
XudongXiao97/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
XudongXiao97/darkriscv
opensouce RISC-V implemented from scratch in one night!
XudongXiao97/Digital-System-Design
ECE 319 at Lehigh
XudongXiao97/e200_opensource
The Ultra-Low Power RISC Core
XudongXiao97/face-detection-recognition
Face recognition algorithm learning
XudongXiao97/Face-Resources
XudongXiao97/FPGABasedHighPerformanceTargetChecking
it is a set for all the respository of the project.
XudongXiao97/High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado HLS. Now under 2018.2 version.
XudongXiao97/ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
XudongXiao97/live
电视台直播m3u8链接/m3u播放列表/广播/IPTV,包含成人色情/Sex
XudongXiao97/Machine-learning-learning-notes
周志华《机器学习》又称西瓜书是一本较为全面的书籍，书中详细介绍了机器学习领域不同类型的算法(例如：监督学习、无监督学习、半监督学习、强化学习、集成降维、特征选择等)，记录了本人在学习过程中的理解思路与扩展知识点，希望对新人阅读西瓜书有所帮助！
XudongXiao97/Machine-Learning-Session
XudongXiao97/opencv
Open Source Computer Vision Library
XudongXiao97/pp4fpgas-cn
中文版 Parallel Programming for FPGAs
XudongXiao97/pp4fpgas-cn-hls
HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
XudongXiao97/pumpkin-book
《机器学习》（西瓜书）公式推导解析，在线阅读地址：https://datawhalechina.github.io/pumpkin-book
XudongXiao97/PYNQ
Python Productivity for ZYNQ
XudongXiao97/PynqDocs
PYNQ学习资料
XudongXiao97/RV32IC-RTL-modeling-and-Verification
XudongXiao97/sdram-controller
Verilog SDRAM memory controller
XudongXiao97/verilog-axi
Verilog AXI components for FPGA implementation
XudongXiao97/verilog-ethernet
Verilog Ethernet components for FPGA implementation
XudongXiao97/zju-icicles
浙江大学课程攻略共享计划