YishuangBi

YishuangBi's Stars

• OpenCAPI/oc-accel

  OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology

  Language:Verilog6445

• ChenJianyunp/FPGA-Snappy-Decompressor

  A new kind of hardware decompressor for Snappy decompression. Much faster than the existing software one.

  Language:Verilog215

• ChenJianyunp/Posit32-2-exact-multiply-accumulator

  This is a hardware implementation of exact multiply accumulator for 32-bit posit number with es=2

  Language:Verilog154

• lvandam/pairhmm_posit_hdl_arrow

  Pair-HMM Accelerator with Posit Arithmetic using CAPI SNAP & Apache Arrow

  Language:VHDL32

• lvandam/posit_blas_hdl

  Posit Arithmetic Accelerator interfacing with Apache Arrow & CAPI SNAP

  Language:VHDL9

• oprecomp/HLS_BLSTM

  The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))

  Language:Objective-C128

• tensorflow/tensorflow

  An Open Source Machine Learning Framework for Everyone

  Language:C++186k74.2k

• luyong6/snap

  CAPI SNAP Framework Hardware and Software

  Language:C2

• seldridge/verilog

  Repository for basic (and not so basic) Verilog blocks with high re-use potential

  Language:Verilog549139

• hunterlew/convolution_network_on_FPGA

  CNN acceleration on virtex-7 FPGA with verilog HDL

  Language:Verilog398130

• kalpataru/IP_Stream_Encryption_using_AES_and_FPGA

  This project contains synthesized verilog codes for Encryption/Decryption of secure IP stream using Advanced Encryption Standard (AES) algorithm and implemented through Field Programmable Gate Array (FPGA). This is a very optimized code for handling IP packets and encrypt/decrypt the data part using a 128-bit block cipher. It uses a pipeline and sub pipeline architecture.

  145

• open-power/snap

  CAPI SNAP Framework Hardware and Software

  Language:C10861

• sbates130272/capi-textswap

  A "Hello World" for the Power8 CAPI Interface. Includes application C and RTL code.

  Language:C185