Pinned Repositories
arvi
A RISC-V implementation in SystemVerilog
cad
chip-8
Chip-8 Interpreter
esp-isa-sim
Custom extensions to the RISC-V isa simulator for the UCB-BAR ESP project
GB-Emulator
Game Boy Emulator
gedit
GNOME Text Editor
gem5
The official repository for the gem5 computer-system architecture simulator.
gemmini-rocc-tests
Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
hdc
A collection of Hyperdimensional Computing (HDC) models implemented in C++
Nokia-LCD5110-HAL
Nokia LCD 5110 library to use with HAL GPIO on STM32 devices
Zeldax64's Repositories
Zeldax64/Nokia-LCD5110-HAL
Nokia LCD 5110 library to use with HAL GPIO on STM32 devices
Zeldax64/arvi
A RISC-V implementation in SystemVerilog
Zeldax64/hdc
A collection of Hyperdimensional Computing (HDC) models implemented in C++
Zeldax64/cad
Zeldax64/chip-8
Chip-8 Interpreter
Zeldax64/esp-isa-sim
Custom extensions to the RISC-V isa simulator for the UCB-BAR ESP project
Zeldax64/GB-Emulator
Game Boy Emulator
Zeldax64/gedit
GNOME Text Editor
Zeldax64/gem5
The official repository for the gem5 computer-system architecture simulator.
Zeldax64/gemmini-rocc-tests
Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
Zeldax64/RayCaster
Simple Ray Caster
Zeldax64/HD-IDHV
Zeldax64/ibm-raven-main
Example application of the paper "A Neuro-vector-symbolic architecture for Solving Raven's Progressive Matrices" published in Nature Machine Intelligence 2023.
Zeldax64/mibench
The MiBench testsuite, extended for use in general embedded environments
Zeldax64/neuro-vector-symbolic-architectures
PyTorch Implementation of the paper "A Neuro-vector-symbolic architecture for Solving Raven's Progressive Matrices" published in Nature Machine Intelligence 2023.
Zeldax64/OpenGL
Self-studies in OpenGL
Zeldax64/riscv-formal
RISC-V Formal Verification Framework
Zeldax64/riscv-tests
Zeldax64/rocket-chip
Rocket Chip Generator
Zeldax64/torchhd
Torchhd is a Python library for Hyperdimensional Computing and Vector Symbolic Architectures