ZhipengFan1407

Electrical Engineering Graduate Student at Columbia University.

Pinned Repositories

FIR-Filter
A 64-tap 16-bit FIR filter in Verilog.
Language:Verilog21
Microphone_Project_V2.0
A DIY USB microphone project.
00
Microphone_Project_V3.0
A new iteration of my microphone with dual channel audio input and usb interface with usb audio codec from Ti.
00

ZhipengFan1407's Repositories

ZhipengFan1407/FIR-Filter
A 64-tap 16-bit FIR filter in Verilog.
Language:Verilog21
ZhipengFan1407/Microphone_Project_V2.0
A DIY USB microphone project.
00
ZhipengFan1407/Microphone_Project_V3.0
A new iteration of my microphone with dual channel audio input and usb interface with usb audio codec from Ti.
00