/Basic_Embedded_SoC

This Repo contains a code for a very basic uC that has (4 Custom IP Core + Basic Bus + Basic MMIO controller)

Primary LanguageSystemVerilog

Basic_Embedded_SoC

This Repo contains a code for a very basic Embedded SoC that has (4 Custom IP Cores + Basic Bus + Basic MMIO controller, and a few Cpp Drivers to configure those cores), some extra Custom IP Cores (XADC, SPI, I2C, NCO, Video Display core, .....) will be added to the system in the future. Circuits and Block Diagrams of different modules will be added + some TBs of some of the cores used in the system

Future Projects 1: RISC V core to replace the uBlaze core currently in use.

Future Projects 2: ARM AHB Lite Bus to replace the Basic Bus Currently used, As Although it is more complex and involved but the logic is almost identical to the Basic Bus.