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async4ph
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Tcl
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fanumpy
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fpga-python
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octopus
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precure_7seg
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Verilog
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validate-design
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Tcl
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VCDReader
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Python
2
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vivado_dpic_axi4lite_mst
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SystemVerilog
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1
vivado_dpic_python
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vivado_magic
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1
a5teri5m's Repositories
a5teri5m/
VCDReader
Language:
Python
2
0
a5teri5m/
async4ph
Language:
Tcl
0
0
a5teri5m/
fanumpy
0
0
a5teri5m/
fpga-python
Language:
Python
0
0
a5teri5m/
octopus
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0
a5teri5m/
precure_7seg
Language:
Verilog
0
0
a5teri5m/
validate-design
Language:
Tcl
0
0
a5teri5m/
vivado_dpic_axi4lite_mst
Language:
SystemVerilog
0
1
a5teri5m/
vivado_dpic_python
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0
a5teri5m/
vivado_magic
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Python
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1
a5teri5m/
vivado_vcs
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Tcl
a5teri5m/
vivado_vcs_test_hdl
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Verilog
a5teri5m/
vivado_vcs_test_ip
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Tcl