Built a simple processor that was 8 bits wide, in Logisim, that could do various register transfers and ALU operations over a common bus. Designed nine 8-bit registers to keep track to various ALU operations. Used a 32 X 24 RAM Module with separate load and store ports to store MIPS instructions, which was then passed to multiple components within the CPU to change these registers. Also designed a 5 bit synchronous program counter to contain the address of current instruction being executed by the CPU.
Authors: Aakash Prabhu, Yash Vardhan Bhartia