adwranovsky
I do FPGA stuff for fun, but work in signal integrity. B.S. Computer Engineering from UW Madison
Wouldn't you like to knowMadison, Wisconsin
Pinned Repositories
buildingblocks
A collection of short and sweet HDL blocks written in MyHDL
clkdiv
A Verilog module for dividing an input clock
CoreOrchard
My collection of HDL cores
crc8
A formally-proven crc8 module written in Verilog
ebuilds
My personal Gentoo ebuilds.
fifo
Generic FIFO implementation with optional FWFT
ft2232_board
A simple FT2232 board that breaks out JTAG on channel A and UART on channel B
hdmi_pmod
A simple digital video breakout board
hello_hdlmake
An example Arty-A7 project using hdlmake
quick_spi
A quick way to integrate a SPI peripheral into an FPGA design
adwranovsky's Repositories
adwranovsky/hdmi_pmod
A simple digital video breakout board
adwranovsky/buildingblocks
A collection of short and sweet HDL blocks written in MyHDL
adwranovsky/ft2232_board
A simple FT2232 board that breaks out JTAG on channel A and UART on channel B
adwranovsky/clkdiv
A Verilog module for dividing an input clock
adwranovsky/CoreOrchard
My collection of HDL cores
adwranovsky/crc8
A formally-proven crc8 module written in Verilog
adwranovsky/ebuilds
My personal Gentoo ebuilds.
adwranovsky/fifo
Generic FIFO implementation with optional FWFT
adwranovsky/hello_hdlmake
An example Arty-A7 project using hdlmake
adwranovsky/quick_spi
A quick way to integrate a SPI peripheral into an FPGA design
adwranovsky/pmod_ad1_example
A simple FPGA project using Digilent's PMOD AD1 on the Arty A7 35T development board
adwranovsky/quick_uart
Quickly add UART TX and RX interfaces to an FPGA project
adwranovsky/rfc1055
Rust no_std library for encoding and decoding RFC1055 SLIP frames
adwranovsky/shift_register
A shift register module written in Verilog
adwranovsky/TheCube
ECE453 Project
adwranovsky/timer
A timer module written in Verilog