/Arithmetic-Logic-Unit-ALU-Design-and-Simulation-In-Verilog-and-Proteus

This is a repository for our EEE 304 course project. The name of the course is Digital Electronics Laboratory. We have explored the ALU section of modern CPU using the concept of elementary digital electronics. Here verilog HDL was coded using Quartus II 9.0 version software and 4 bit ALU hardware design was done using Proteus software.

Primary LanguageVerilog

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