akarxxx1030
Hey there! I geek into microarchitectural concepts and floss over performance enhancements in the architectural scheme! FOSS & RISCV! Join the Revolution.
Bangalore, Karnataka
Pinned Repositories
100DaysOfTLV
Hey There! Welcome to my journey of dissecting and exploring the corners of Transaction Level Verilog HDL! 100 days of building and experimenting!
ai-aes
This is a submission for Efabless AI Generated Design Contest.
akarxxx1030
BFS-on-CUDA
diablo
diablo is an Out-Of-Order 64-bit RISC-V processor
gapbs
GAP Benchmark Suite
MPI-Memento
Involves a brief list of Message Passing Interface (MPI) programs I had worked on in my Summer School at IIT Palakkad, June 2023.
pes_karatsuba_multiplier
This repo includes all the files related to the design of a 32-bit multiplier invigorated with the Karatsuba Algorithm on Hardware Description Language SystemVerilog.
pes_karatsuba_multiplier_tapeout
TapeoutSzn
The road to tapeout is real. Welcome to my assignment hub! Physical Design w/ASICs Aug-Dec'23
akarxxx1030's Repositories
akarxxx1030/100DaysOfTLV
Hey There! Welcome to my journey of dissecting and exploring the corners of Transaction Level Verilog HDL! 100 days of building and experimenting!
akarxxx1030/TapeoutSzn
The road to tapeout is real. Welcome to my assignment hub! Physical Design w/ASICs Aug-Dec'23
akarxxx1030/ai-aes
This is a submission for Efabless AI Generated Design Contest.
akarxxx1030/akarxxx1030
akarxxx1030/BFS-on-CUDA
akarxxx1030/diablo
diablo is an Out-Of-Order 64-bit RISC-V processor
akarxxx1030/gapbs
GAP Benchmark Suite
akarxxx1030/MPI-Memento
Involves a brief list of Message Passing Interface (MPI) programs I had worked on in my Summer School at IIT Palakkad, June 2023.
akarxxx1030/pes_karatsuba_multiplier
This repo includes all the files related to the design of a 32-bit multiplier invigorated with the Karatsuba Algorithm on Hardware Description Language SystemVerilog.
akarxxx1030/pes_karatsuba_multiplier_tapeout
akarxxx1030/Ripes
A graphical processor simulator and assembly editor for the RISC-V ISA