/ch569-hspi-fpga

Gateware to communicate with the high speed parallel interface (HSPI) of the CH569 with a FPGA

Primary LanguagePythonBSD 3-Clause "New" or "Revised" LicenseBSD-3-Clause

Gateware for the WCH-Tech CH569 High Speed Parallel Interface (HSPI)

This package provides gateware to communicate with the High Speed Parallel Interface of the WCH-Tech CH569 USB3 Super Speed chip. The gateware is written in amaranth HDL and can be easily converted into Verilog, if necessary.

Both, transmitter and receiver cores are provided, using a simple stream-like interface.

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