Pinned Repositories
ADPLL
All Digital Phase-Locked Loop (ADPLL)
anlit75
anlit75.github.io
My Portfolio Website
CCU-Thesis-LaTeX-Template
Unofficial LaTeX templates for both master's thesis and doctoral dissertations at National Chung Cheng University. 國立中正大學碩博士論文LaTex模板
DIC-FAQ
HDLBits
Verilog practice and solutions on HDLBits website
SV-TBLab
SystemVerilog Testbench Workshop Lab
tt05-4bits-ALU
This 4-bit ALU (Arithmetic Logic Unit) is a digital computation unit capable of executing 16 different operations.
tt05-rule110
This project uses Verilog to create a 256-cell Rule 110 cellular automaton, which is a one-dimensional system that evolves according to a simple rule.
anlit75's Repositories
anlit75/CCU-Thesis-LaTeX-Template
Unofficial LaTeX templates for both master's thesis and doctoral dissertations at National Chung Cheng University. 國立中正大學碩博士論文LaTex模板
anlit75/ADPLL
All Digital Phase-Locked Loop (ADPLL)
anlit75/anlit75
anlit75/anlit75.github.io
My Portfolio Website
anlit75/DIC-FAQ
anlit75/HDLBits
Verilog practice and solutions on HDLBits website
anlit75/SV-TBLab
SystemVerilog Testbench Workshop Lab
anlit75/tt05-4bits-ALU
This 4-bit ALU (Arithmetic Logic Unit) is a digital computation unit capable of executing 16 different operations.
anlit75/tt05-rule110
This project uses Verilog to create a 256-cell Rule 110 cellular automaton, which is a one-dimensional system that evolves according to a simple rule.