anniezfy

Student of the University of ChonqQing Welcome to My Repository !!!🤣 Hope you can get what you want ~

University of ChonqQing

Pinned Repositories

axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Language:SystemVerilog10
berkeley-hardfloat
Language:Scala10
CGRA-Flow
CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
Language:Python10
circt
Circuit IR Compilers and Tools
Language:C++10
circt-hls
CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
Language:C++10
dynamatic
Language:C++10
Figure_
Some ducuments Photos
10
FIR_Filter
In signal processing, a finite impulse response (FIR) filter is a filter whose impulseresponse(or response to any finite length input) is of finite duration, because it settles to zero in finite time. This is in contrast to infinite impulse response (IIR) filters, which have internal feedback and may continue to respond indefinitely (usually decaying).
Language:Verilog10
IR_DOT
A “Toy” Script transoforms MLIR Affine Dialect to Dot Visualized Format
Language:Shell41
SCALE-Sim
Language:Python20

anniezfy's Repositories

anniezfy/IR_DOT
A “Toy” Script transoforms MLIR Affine Dialect to Dot Visualized Format
Language:Shell41
anniezfy/berkeley-hardfloat
Language:Scala10
anniezfy/CGRA-Flow
CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
Language:Python10
anniezfy/circt
Circuit IR Compilers and Tools
Language:C++10
anniezfy/Figure_
Some ducuments Photos
10
anniezfy/Hector
A hardware synthesis framework with multi-level paradigm
Language:C++1
anniezfy/heterocl
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
1
anniezfy/llvm-project-mine
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
13
anniezfy/mlir-aie
An MLIR-based toolchain for Xilinx Versal AIEngine-based devices.
1
anniezfy/mlir-cgra
An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
1
anniezfy/mlir-tutorial
Language:C++1
anniezfy/nelli
A lightweight, Pythonic, frontend for MLIR
1
anniezfy/Polygeist
C/C++ frontend for MLIR. Also features polyhedral optimizations, parallel optimizations, and more!
Language:C++1
anniezfy/scalehls
A scalable High-Level Synthesis framework on MLIR
Language:MLIR1
anniezfy/TensorFlow-PCA
An implementation of principle component analysis using TensorFlow's singular value decomposition
Language:Python1
anniezfy/aha
anniezfy/antlr4
ANTLR (ANother Tool for Language Recognition) is a powerful parser generator for reading, processing, executing, or translating structured text or binary files.
anniezfy/CGRA-Mapper
An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
anniezfy/computer-science
:mortar_board: Path to a free self-taught education in Computer Science!
anniezfy/gemmini
Berkeley's Spatial Array Generator
anniezfy/iree
A retargetable MLIR-based machine learning compiler and runtime toolkit.
anniezfy/mlir-hello
MLIR Sample dialect
anniezfy/morpher
An Open-Source Tool for CGRA Accelerators
anniezfy/pillars
An integrated CGRA design framework
anniezfy/polymer
Bridging polyhedral analysis tools to the MLIR framework
anniezfy/POM
anniezfy/timeloop
Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.
anniezfy/Vitis-Tutorials
Vitis In-Depth Tutorials
anniezfy/xdsl
A Python Compiler Design Toolkit
anniezfy/xla
A machine learning compiler for GPUs, CPUs, and ML accelerators