[AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B3_CORE_X24Y0/AIE_PL_TO_AIE_0 exceeds

[kediarajesh]

Dear ARC Lab,
Thanks for releasing the code open-source and the nice work. I tried replicating the flow as per the instructions and get the following error on executing make all PLATFORM=${PATH} EDGE_COMMON_SW_PATH=${PATH} SYSROOT_PATH={PATH}
Just checking if there is any quick hint/resolution that you are aware of?

Regards,
Rajesh

Total Number of unique Switch FIFOs: 0
Running AIE Post-Map Finalizer.
Post-Map Finalizer succeeded.
Ordered merge post process: Adding BD config broadcast nets
Running AIE Post-Map Finalizer.
Post-Map Finalizer succeeded.
Check AIE-ROUTER has run: 12 errors
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B3_CORE_X24Y0/AIE_PL_TO_AIE_0 exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B3_CORE_X24Y0/AIE_PL_TO_AIE_4 exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B3_CORE_X24Y0/AIE_PL_TO_AIE_0_PIN exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B3_CORE_X24Y0/AIE_PL_TO_AIE_4_PIN exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B3_CORE_X24Y0/AIE_SWITCH_S_SOUTH_CH0_PIN exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B3_CORE_X24Y0/AIE_SWITCH_S_SOUTH_CH4_PIN exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B0_CORE_X25Y0/AIE_PL_TO_AIE_0 exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B0_CORE_X25Y0/AIE_PL_TO_AIE_4 exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B0_CORE_X25Y0/AIE_PL_TO_AIE_0_PIN exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B0_CORE_X25Y0/AIE_PL_TO_AIE_4_PIN exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B0_CORE_X25Y0/AIE_SWITCH_S_SOUTH_CH0_PIN exceeds limit of 100.
ERROR: [AIE-ROUTER-3] Demand of 200 at node AIE_INTF_B0_CORE_X25Y0/AIE_SWITCH_S_SOUTH_CH4_PIN exceeds limit of 100.
HDRTPinDelayHelperV10:: Clearing pin delay helper
Releasing pin delay helper for floorplan 0x6661ea70
HDRTPinDelayHelperV10:: Releasing Pin Dly Helper
NodeGraph Released.
DeviceData Released.
ERROR:MathEngineUDMRouter:###UDM Router Did NOT Finish Successfully
/tools/Xilinx/Vitis/2022.2/aietools/bin/aieir_be: line 98: kill: (-871611) - No such process
Compilation Failed
INFO: [aiecompiler 77-5805] Run completed. Additional information can be found in:
Guidance: ./Work/reports/guidance.html

INFO: [aiecompiler 77-5806] Use the vitis_analyzer tool to visualize and navigate the relevant reports. Run the following command.
vitis_analyzer ./Work/mm_top.aiecompile_summary
/tools/Xilinx/Vitis/2022.2/aietools/bin/aiecompiler: line 83: kill: (-871297) - No such process

[JinmingZhuang]

Hi,

I appreciate your interest in our CHARM project!

Currently, the project should work correctly when using Vitis 2021.1. We are still trying to contact AMD to make it work on the latest Vitis versions.

We will update our repo once we figure it out.

Best,
Jinming