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| EPC9137 Power Module | EPC9528 Controller Card | |||||
This code example demonstrates a closed loop current mode control implementation for dsPIC33CK. It has been specifically developed for the EPC9137 1.5 kW Bi-Directional 48V-to-12V power module, hardware revision 4.0 (see 'Rev' number printed on board top view shown above for verification).
<iframe width="560" height="315" src="https://www.youtube-nocookie.com/embed/rXREE3YrfNY" title="YouTube video player" frameborder="0" allow="accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture" allowfullscreen> </iframe>Bidirectional 1.5 kW 48-to-12V Bus Converter Introduction
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The board starts up automatically when a voltage between defined minimum and maximum input voltage is applied across the 48V-input terminals of the board, providing a regulated output voltage of 12 V DC at the output terminals of the converter. The startup procedure is controlled and executed by the power controller state machine and includes a configurable startup procedure with power-on delay, ramp-up period and power-good delay before dropping into constant regulation mode.
An additional fault handler routine continuously monitors incoming ADC data and peripheral status bits and shuts down the power supply if
- the input voltage is outside the defined maximum range (UVLO/OVLO)
- the output voltage is more than 0.5 V out of regulation for more than 25 milliseconds
- the heat-sink base temperature exceeds 95°C (OTP)
- the total output current exceeds 130 A (buck mode) resp. 35 A (boost mode)
The converter automatically recovers from all detected fault conditions listed above.
- Input Voltage: 17 V to 64 V DC
- Output Voltage: 12.0 / 13.2 V DC (12 V default setting)
- Switching Frequency: 250 kHz
- Control Frequency: 250 kHz
- Cross-Over Frequency: ~5 kHz
- Phase Margin: ~ 60°
- Gain Margin: ~ 12 dB
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- EPC9137 Online Firmware Documentation (coming soon)
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Unattended operating power supplies are always a potential safety risk as short circuits or failures of power components can occur at any time where even seemingly small power converters can cause fire or damage connected equipment.
- This development board has not been FCC approved nor certified and must not be used outside a laboratory environment
- Never operate the board unattended
- Only use power supplies delivered with the board or equal, approved laboratory equipment
- Read the user guide for detailed operating instructions to prevent damage to the board or connected equipment
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The EPC9137/EPC9528 kit comes programmed in buck mode and ready to be used when unpacked. No reprogramming of the target device is required to operate the board unless features, modes or settings such as the nominal output voltage or start-up timing need to be modified.
The EPC9528 controller card must be plugged into the EPC9137 power module before power is applied to the development kit. The converter is starting up automatically when more than 17 V DC are applied across the 48V input terminals of the EPC9137 power module.
In case firmware based features or operating modes need to be changed, the Microchip dsPIC33CK controller can be re-programmed using the in-circuit serial programming port (ICSP) available on the 5-pin header provided on the EPC9528 Controller Card. This interface supports all of Microchip’s in-circuit programmers/debuggers, such as MPLAB® ICD4, MPLAB® REAL ICE or MPLAB® PICkit4 and previous derivatives.
Please read the EPC9528 Quick Start Guide to get detailed information about the requirements for setup and operation of this development kit.
If the heat sink has not been mounted yet, it is highly recommended to assemble it before high power test procedures are performed. Without heat sink there is a high risk of thermal overstress, shortening the lifetime of the development kit and baring the risk of irreversible damage.
EPC9137 Heat Sink Assembly
Please read the user guide for more detailed instructions on the proper mounting procedure.
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This is the default setup supported by the firmware provided. When connected to a DC bench supply and load, this kit can be operated as standard, fixed output voltage 48V-to-12V step down converter. If the output is driven into current limit at 125 A of output current, the converter will drop into constant current mode until the output voltage drops below 7V.
EPC9137 Buck Mode Setup
Test Conditions: VIN = 48 V DC
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| EPC9137 Buck Mode Efficiency | EPC9137 Buck Mode Losses | ||
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EPC9137 Buck Mode Output Voltage Ripple (2 µs/div, 100 mV/div) |
EPC9137 Buck Mode Transient Response @ VOUT = 12 V [ VOUT , IOUT] (2 ms/div, 500 mV/div, 6 A/div) |
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EPC9137 Buck Mode Output Voltage Startup Timing (100 ms/div, 3 V/div) |
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In boost mode, the converter starts up as soon as input voltage between 9 V DC and 18 V DC is applied to the 12 V DC terminals of EPC9137.
EPC9137 Boost Mode Setup
Test Conditions: VIN = 12 V DC
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(test results not available in this firmware release)
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The EPC9137/EPC9528 kit allows paralleling of up to two EPC9137 power modules controlled by one EPC9528 controller card. In this configuration the kit can provide up to 250 A of output current (= 3 kW @ VOUT = 12 V DC).
EPC9137 4-Phase Converter Setup
Test Conditions: VIN = 48 V DC
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(test results not available in this firmware release)
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To simplify test procedures and allow long-term testing with reduced power consumption, two EPC9137/EPC9528 kits can be operated in counter-wise step-down/step-up mode, effectively circling power through both converters. Due to the inevitable power losses, an additional auxiliary power supply (e.g. bench power supply) must be connected to either 48 V- or 12 V-rail side to keep the operation going. It is recommended to buffer both bus rails with larger off-board capacitors to balance the 12 V versus the 48 V bus.
EPC9137 Loop Test Mode Setup
Test Conditions: VIN = 48 V DC
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(test results not available in this firmware release)
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The state machine goes through the following steps in chronological order:
In this step the control loop parameters are reset to their defaults, PWM outputs are turned off but the PWM generators are still running, continuously triggering the ADC sampling input and output voltage as well as board temperature.
This is the 'fall-back' state from which the buck converter will be restarted once it has been started successfully and has been shut down due to a fault condition (e.g. input under/over voltage or over temperature condition)
After RESET, the state machine waits for all fault flags to be cleared and the ENABLE and GO bits to be set.
Once the buck converter has been cleared the state machine will execute the startup procedure starting with the Power On Delay. This is just a simple delay during which the converter will remain inactive but the fault handler will observe the values generated by the ADC for occurring fault conditions.
After the Power-On delay has expired, input and output voltage will be measured. In case the converter output is pre-biased (voltage = non-zero), the power controller will be 'pre-charged' with an artificial control history and PWM output to softly ramp up the output voltage from its most recent level.
Now the digital feedback loop and PWM are enabled and the closed loop system reference value is incremented with every execution of the state machine (100 µsec interval). The control loop has been adjusted to operate with a cross-over frequency of >10 kHz matching the maximum perturbation frequency allowed to keep the control system stable.
After the reference voltage has been increased to the pre-defined nominal level, the state machine switches over into the Power Good Delay period. This is another, simple delay where the control loop is in steady state waiting for the delay period to expire.
After the Power Good Delay has expired, the converter drops into nominal operation. In this condition it continuously observes the reference value for changes. Should any other part of the firmware change the controller reference, the state machine will softly tune into the new level instead of hard-switching the reference.
If the power controller is shut down and reset by external commands (e.g. fault handler detecting a fault condition or through user-interaction), the state machine is switching into the SUSPEND state, which disables the PWM outputs and control loop execution, clears the control histories and resets the state machine back to RESET
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The bi-directional control system of EPC9137 is based on the conventional Average Current Mode Control (ACMC). An outer voltage loop regulates the output voltage by comparing the most recent feedback value against an internal reference. The deviation is processed by a discrete type II (2P2Z) compensation filter. The output of the voltage loop sets the reference for the two inner current loops. Each phase current controller processes the deviation between the given dynamic current reference and the individual most recent current feedback. Each current control loop output adjusts the individual duty cycle or phase resulting in tightly balanced phase currents. This control scheme is applied to both, 48 V to 12 V downstream buck as well as to 12 V to 48 V upstream boost operation.
When powered from a single DC source from either side of the converter, the output voltage will be kept constant up to the maximum output current of 125 A in buck, respectively 29 A in boost operation, at which point the converter switches into constant current regulation, effectively disabling the voltage regulation.
This firmware serves as the fundamental building block of battery charging bus balancer systems by implementing an optional, chemistry-specific charging profile balancing between two battery powered bus rails.
EPC9137 Average Current Mode Control Loop
This control loop can be turned on/off by using the ENABLE bit in the STATUS word of the cNPNZ_t controller data structure. The control loop source code is generated and configured by the PowerSmart™ - Digital Control Library Designer (PS-DCLD) software.
This additional design software is available for download on Github Pages:
Once installed, the controller configuration can be modified. The most recent configuration can be opened from within the MPLAB X® IDE by right-clicking on the file 'v_loop.dcld' for the outer voltage loop configuration, resp. 'i_loop.dcld' for the inner current loop, located in the Important Files folder of the Project Manager. When right-clicked, select 'Open In System' to open the configuration in PowerSmart™ DCLD.
Please refer to the user guide of PowerSmart™ DCLD which is included in the software and can be opened from the help menu of the application.
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No user control interface has been added to the firmware. Any change to the firmware and fundamental operation of the reference design, including reprogramming of the nominal output voltage can be done by editing the hardware-specific values in the hardware description header file 'epc9137_r40_hwdescr.h' located in 'Project Manager => Header Files/Config'
Converter settings in this file are defined as physical quantities such as Volt, Ampere, Ohm, etc. Each defined value is converted into binary numbers by so-called macros, at compile time. Thus, users do not have to convert values manually.
To program the converter to provide a nominal output voltage different from the 12 V DC set by default, follow these steps:
- Open the project in MPLAB X® IDE
- Navigate to 'Header Files/Config/epc9137_r10_hwdescr.h' using the Project Manager on the left side of the main window
- Search for marco
BUCK_VOUT_NOMINAL(see below) - Change the give settings as desired
- Build the program
- Remove power from the input of the EPC9528 Controller Card
- Connect a valid ICSP programming device (e.g. MPLAB ICD4, MPLAB PICkit4) to the PC and the EPC9528 Controller Card (see EPC9528 Quick Start Guide for details)
- Program the device with the target device being powered by the debugger/programmer
- Disconnect the ICSP programming device from the EPC9528 Controller Card
- Apply valid input voltage across the input terminals and observe the output of the EPC9137 power module
The setting for the nominal output voltage is found in the output voltage parameters declaration section.
#define BUCK_VOUT_NOMINAL (float)12.000 // Nominal output voltage
#define BUCK_VOUT_TOLERANCE_MAX (float)0.500 // Output voltage tolerance [+/-]
#define BUCK_VOUT_TOLERANCE_MIN (float)0.100 // Output voltage tolerance [+/-]The tolerance settings above include the transient response at a maximum load step. The value for maximum output voltage tolerance BUCK_VOUT_TOLERANCE_MAX is observed by the fault handler. Should the output voltage reading divert from the most recent reference voltage value by more than the given range, the converter will be shut down and a REGULATION ERROR will be indicated. The power supply will automatically recover as soon as the fault condition has been cleared and the recover delay period specified by BUCK_REGERR_RECOVERY_DELAY, declared in the EPC9137 hardware description header file, has expired.
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This code examples includes an alternative, proportional control loop which is commonly used during measurements of the frequency response of the power plant. When the following define is set to TRUE, the common main control loop is replaced by the proportional controller.
epc9137_r40_hwdescr.h: #define PLANT_MEASUREMENT falsePROPORTIONAL CONTROLLERS ARE BY DEFAULT UNSTABLE AND NOT SUITED TO REGULATE THE OUTPUT OF A POWER SUPPLY UNDER NORMAL OPERATING CONDITIONS. DURING A PLANT MEASUREMENT IT IS MANDATORY THAT INPUT VOLTAGE AND LOAD REMAIN STABLE AND DO NOT CHANGE.
FOR MORE INFORMATION ABOUT HOW TO CONDUCT A POWER PLANT MEASUREMENT, PLEASE READ THE SECTIONS IN THE PowerSmart™ DCLD USER GUIDE.
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