ashvah

A Phd student

Shanghai Jiao Tong UniversityShanghai Jiao Tong University

Pinned Repositories

cpu-pipelining
Implement a MIPS 5-stage pipelined CPU using Vivado
Language:Verilog1 1 01
garbage-collector
Garbage collector
Language:Java1 1 00
my_pok
pok-kernel with more schedulers
Language:C2 1 00
sanskrit
Sanskrit notes & sentence translation
3 1 01
sat-solver
A simple implementation of DPLL
Language:Java0 1 00
sicp-solutions
My solutions to the exercises of SICP
Language:Scheme1 1 00
simpl-interpreter
An interpreter for SimPL
Language:Java1 1 00

ashvah's Repositories

ashvah/sanskrit
Sanskrit notes & sentence translation
3 1 01
ashvah/my_pok
pok-kernel with more schedulers
Language:C2 1 00
ashvah/cpu-pipelining
Implement a MIPS 5-stage pipelined CPU using Vivado
Language:Verilog1 1 01
ashvah/garbage-collector
Garbage collector
Language:Java1 1 00
ashvah/sicp-solutions
My solutions to the exercises of SICP
Language:Scheme1 1 00
ashvah/simpl-interpreter
An interpreter for SimPL
Language:Java1 1 00
ashvah/sat-solver
A simple implementation of DPLL
Language:Java0 1 00