Protoip is a utility for quickly prototyping C-based IP in FPGA hardware: abstracting many specific low level FPGA design details, protoip shifts the main focus to IP (algorithm) coding (C/C++ programming language), and boosts productivity.
Protoip provides Tcl-based functions accessible by both Xilinx Vivado Design Suite and Matlab, custom templates, examples and tutorials to support all design phases.
Protoip is a Xilinx TclStore application and comes together with Xilinx Vivado Design Suite.
The wiki contains documentation on how to use Protoip from both Xilinx Vivado and Matlab software. Example designs are also available.
@INPROCEEDINGS{protoip,
author={B. Khusainov and E. C. Kerrigan and A. Suardi and G. A. Constantinides},
booktitle={IFAC World Congress 2017},
title={Nonlinear predictive control on a heterogeneous computing platform},
year={2017},
month={July},}
This work has been supported by the EPSRC Impact Acceleration grant number EP/K503733/1