Pinned Repositories
aib-phy-generator
AIB Generator: Analog hardware compiler for AIB PHY
aic2023
Advanced integrated circuits 2023
bag
BAG framework
Book-on-gm-ID-design
Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"
cds-bindkeys
Cadence Virtuoso Bindkeys
daisy
daisy
dicex
Exercises for Design of Integrated circuits
jugaad-trader
Unofficial python client for Zerodha
logicmin
Logic Minimization in Python
SKILLA
Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.
avlsi's Repositories
avlsi/SKILLA
Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.
avlsi/aib-phy-generator
AIB Generator: Analog hardware compiler for AIB PHY
avlsi/aic2023
Advanced integrated circuits 2023
avlsi/bag
BAG framework
avlsi/Book-on-gm-ID-design
Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"
avlsi/cds-bindkeys
Cadence Virtuoso Bindkeys
avlsi/daisy
daisy
avlsi/dicex
Exercises for Design of Integrated circuits
avlsi/jugaad-trader
Unofficial python client for Zerodha
avlsi/logicmin
Logic Minimization in Python
avlsi/pybag
avlsi/pygmid
Python3 implementation of the gm/ID starter kit
avlsi/serdespy
Python library for SerDes modelling
avlsi/Skill
my cadence/virtuoso/icfb skill functions develloped over the years
avlsi/SRAM-Margin-Butterfly
This project is a tool to help find the read/hod/write margins of SRAM bitcell and draw the corresponding butterfly diagrams.
avlsi/VerilogA-Wave-Generator
The codes are used to generate the VerilogA code which can be directly used in the spectre simulation .The generated VerilogA code's fuction is to generate the specific waveforms according to your setting.And the setting is done in the python code (main.py), which will facilitate greatly the coding works.
avlsi/zc_plot
Collection of scripts for conveniently plotting Cadence simulations