Reverse-engineering hardware via Satisfiability checking.
aags: And-Inverter Graph text outputs- Throw these in something like https://github.com/ByronHsu/AAG-Visualizer
benchmarks: RTL source code benchmarkscnfs: Conjunctive Normal Form representations of SAT generated modellibraries: Pseudo-cell library mappings for RTLyosys_scripts: Scripts to synthesize and run the SAT attack on RTL benchmakrsrun.sh: Simple script to automate the pipeline.