Pinned Repositories
abc
ABC: System for Sequential Logic Synthesis and Formal Verification
OpenBtcMiner
Bitcoin miner for efabless mpw shuttle
OpenSTA
OpenSTA engine
propeller-clock
Propeller Clock
vscale
Verilog version of Z-scale
yosys
Yosys Open SYnthesis Suite
OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
yosys
Yosys Open SYnthesis Suite
bfg86's Repositories
bfg86/propeller-clock
Propeller Clock
bfg86/abc
ABC: System for Sequential Logic Synthesis and Formal Verification
bfg86/OpenBtcMiner
Bitcoin miner for efabless mpw shuttle
bfg86/OpenSTA
OpenSTA engine
bfg86/vscale
Verilog version of Z-scale
bfg86/yosys
Yosys Open SYnthesis Suite