bif

Pinned Repositories

datavis_ue3_2021
Language:R00
FPGA-Calculator
implement a siple Caldulator on an Altera Stratix EP1S25F672C6
Language:VHDL31
ML-SS2022_Group08_Ex0
Exercies 0 from Group9 - Machine Learning SS2022
Language:HTML00
OOP-Java
10
SAS_3
Language:C++10
SPARC-ISP1362
extentionmodule for SPARC (anciently SPEAR II) for USB chip ISP1362
Language:VHDL21

bif's Repositories

bif/FPGA-Calculator
implement a siple Caldulator on an Altera Stratix EP1S25F672C6
Language:VHDL31
bif/SPARC-ISP1362
extentionmodule for SPARC (anciently SPEAR II) for USB chip ISP1362
Language:VHDL21
bif/OOP-Java
10
bif/SAS_3
Language:C++10
bif/datavis_ue3_2021
Language:R00
bif/ML-SS2022_Group08_Ex0
Exercies 0 from Group9 - Machine Learning SS2022
Language:HTML00