bigdot123456

Bigdot is a true man in the world for all guys!

Pinned Repositories

5GNR
Language:Python7 3 08
5GPolar
Polar encoding & decoding
Language:MATLAB11 4 09
awesome-blockchain-cn
收集所有区块链(BlockChain)技术开发相关资料，包括Fabric和Ethereum开发资料
Language:JavaScript1 2 02
GoDesktop
golang desktop version;1. 如何生成和阅读Go的profile文件 https://medium.com/@wanderson.olivs/generating-and-reading-go-golang-profiles-part-1-db33905decee 2. 知乎容器化构建系统设计和实践 https://zhuanlan.zhihu.com/p/45694823 3. Go中打包静态文件 https://c.isme.pub/2019/01/10/go-static/ 4. tgo：方便追踪程序执行情况的库 https://github.com/ks888/tgo 5. Go使用定制的Flutter引擎编写桌面应用 https://github.com/Drakirus/go-flutter-desktop-embedder 探探GopherChina2019大会全面启动 https://mp.weixin.qq.com/s/h3b5W35jhKN5daU7dQrNEw * * GoCN归档：https://gocn.vip/question/3079
Language:Dart31
LPDC5G
LDPC encoder & decoder with 5G R15 collection
Language:MATLAB6 2 03
Multi-RRU_Pusch
NR Pusch debug
Language:MATLAB8 2 01
RF_data_Check
Language:MATLAB7 2 03
SDR
SDR for OFDM
Language:Verilog3 2 01
tutorial
Deeplearning Algorithms Tutorial
3 3 00
wasmFPGA
Language:Verilog6 3 00

bigdot123456's Repositories

bigdot123456/aib-phy-hardware
Advanced Interface Bus (AIB) die-to-die hardware open source
Language:Verilog2 2 0
bigdot123456/aib-protocols
Language:SystemVerilog1 1 0
bigdot123456/basic_verilog
Must-have verilog systemverilog modules
Language:Verilog1 1 0
bigdot123456/black-parrot
A Linux-capable RISC-V multicore for and by the world
Language:SystemVerilog1 1 0
bigdot123456/corundum
Open source FPGA-based NIC and platform for in-network compute
Language:Verilog1 2 0
bigdot123456/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
1
bigdot123456/DCSynthesisDemo
Design compiler script demo for PDK 45nm
Language:HTML1
bigdot123456/fastvdma
Antmicro's fast, vendor-neutral DMA IP in Chisel
1
bigdot123456/opentitan
OpenTitan: Open source silicon root of trust
Language:SystemVerilog1 1 0
bigdot123456/oss-cad-suite-build
Multi-platform nightly builds of open source digital design and verification tools
Language:Python1 2 0
bigdot123456/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
Language:Verilog1 2 0
bigdot123456/riscv-crypto
RISC-V cryptography extensions standardisation work.
Language:C1 2 0
bigdot123456/riscv-formal
RISC-V Formal Verification Framework
Language:Verilog1 1 0
bigdot123456/synopsys-tensorflow
TensorFlow for use with DesignWare EV Processors
Language:C++1 1 0
bigdot123456/verilog-axis
Verilog AXI stream components for FPGA implementation
Language:Python1 1 0
bigdot123456/verilog-ethernet
Verilog Ethernet components for FPGA implementation
Language:Verilog1 1 0
bigdot123456/verilog-pcie
Verilog PCI express components
Language:Verilog1 2 01
bigdot123456/vivado-library
1
bigdot123456/wb2axip
Bus bridges and other odds and ends
Language:Verilog1 2 0
bigdot123456/wujian100_open
IC design and development should be faster，simpler and more reliable
Language:Verilog1 1 0
bigdot123456/ZYNQ-NVDLA
NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
Language:Verilog1 1 0
bigdot123456/abstract-machine
A minimal, modularized, and machine-independent hardware abstraction layer
bigdot123456/brook
Brook is a cross-platform strong encryption and not detectable proxy. Zero-Configuration. Brook 是一个跨平台的强加密无特征的代理软件. 零配置.
Language:Go2 0
bigdot123456/clusterv-soc
Quad cluster of RISC-V cores with peripherals and local memory
Language:Verilog1 0
bigdot123456/coc.nvim
Nodejs extension host for vim & neovim, load extensions like VSCode and host language servers.
Language:TypeScript2 0
bigdot123456/mempool
A 256-RISC-V-core system with low-latency access into shared L1 memory.
Language:C2 0
bigdot123456/mqttClientPython
It's my first mqtt project.
Language:Python
bigdot123456/NyuziProcessor
GPGPU microprocessor architecture
Language:C2 0
bigdot123456/testGithubspaces
Language:EJS2 0
bigdot123456/wasm-micro-runtime
WebAssembly Micro Runtime (WAMR)
Language:C1 0