This project has two objectives
- Fast C code for emulating IEEE 754-2008 floating point operations
- Based on 1. an efficient floating point hardware in VHDL
- C implementation of half precision: add, multiply, divide
- Complete brute force checking of half precision arithmetics (2^32 cases)
- C implementation of single precision
- C implementation of double precision
- C implementation of quad precision
- Rearrangement of C code to better fit hardware demands
- Translation to VHDL
- Should exceptions be supported?
- More than one rounding mode?
- Decimal support?
Licensed under the ISC licence (similar to the MIT/Expat license).