boltma

boltma's Stars

• DefinitelyTyped/DefinitelyTyped

  The repository for high quality TypeScript type definitions.

  Language:TypeScript49.5k6408.1k30.4k

• typescript-cheatsheets/react

  Cheatsheets for experienced React developers getting started with TypeScript

  Language:JavaScript46.1k3922174.2k

• refined-github/refined-github

  :octocat: Browser extension that simplifies the GitHub interface and adds useful features

  Language:TypeScript26.2k2294.4k1.5k

• microsoft/react-native-windows

  A framework for building native Windows apps with React.

  Language:C++16.7k2794.9k1.2k

• aristocratos/bashtop

  Linux/OSX/FreeBSD resource monitor

  Language:Shell10.9k164194557

• bentrevett/pytorch-seq2seq

  Tutorials on implementing a few sequence-to-sequence (seq2seq) models with PyTorch and TorchText.

  Language:Jupyter Notebook5.5k641941.4k

• missing-semester/missing-semester

  The Missing Semester of Your CS Education 📚

  Language:CSS5.1k46291.2k

• pattle/simpsons-in-css

  Simpsons characters in CSS

  Language:CSS4.6k16921633

• apocas/dockerode

  Docker + Node = Dockerode (Node.js module for Docker's Remote API)

  Language:JavaScript4.5k63588471

• alxshelepenok/lumen

  A constantly evolving and thoughtful architecture for creating static blogs.

  Language:TypeScript2k14192667

• p-ranav/tabulate

  Table Maker for Modern C++

  Language:C++2k3798144

• fengbintu/Neural-Networks-on-Silicon

  This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.

  1.9k3003385

• yeoman/generator-generator

  Generate a Yeoman generator

  Language:JavaScript1.2k41144243

• verilog-to-routing/vtr-verilog-to-routing

  Verilog to Routing -- Open Source CAD Flow for FPGA Research

  Language:C++1.1k661.1k407

• zasdfgbnm/TorchSnooper

  Debug PyTorch code using PySnooper

  Language:Python799151143

• LearningOS/os-lectures

  2025年春季OS课程Slides\实验指导\思维导图\挑战项目等 https://learningos.github.io/os-lectures/

  Language:HTML70521384

• IBM/AccDNN

  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

  Language:Verilog4142414102

• robertying/learnX

  清华大学网络学堂 App，以 React Native 构建。App for Tsinghua University Web Learning, developed with React Native. ⚛️

  Language:TypeScript263517116

• barbedo/vivado-git

  A git-friendly Vivado wrapper

  Language:Tcl232101342

• The-OpenROAD-Project/RePlAce

  RePlAce global placement tool

  Language:Verilog228125376

• charlesliucn/summer-review

  :earth_asia: Review notes for Postgraduate Interview of Tsinghua EE. (Sept. 2017)

  2153132

• hasura/json2graphql

  From a JSON file to postgres-backed realtime GraphQL

  Language:JavaScript20281322

• neurosim/MLP_NeuroSim_V3.0

  Benchmark framework of synaptic device technologies for a simple neural network

  Language:C++20051592

• limbo018/Limbo

  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.

  Language:C++15411153

• SEAL-UCSB/NVSim

  NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)

  Language:C++1126354

• daitoto/EDA-wiki

  EDA wiki

  Language:Shell514038

• neurosim/DNN_NeuroSim_V2.0

  Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)

  Language:C++482918

• boluoweifenda/CNN

  A simple and extensible project based on TensorFlow-Slim image classification model library

  Language:Python324111

• RainEggplant/vscode-verilog-integration

  使用 VSCode 舒适地开发 Verilog

  29303

• supadupaplex/pfecap

  Verilog-A Preisach ferroelectric cap (PFECAP) simulation model for FET

  24416