verilog-to-routing/vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
C++NOASSERTION
Issues
- 0
- 1
[AP] Prepacker Called Twice in AP Flow
#2950 opened by amin1377 - 0
[Pack] Unused Packer Options
#2964 opened by AlexandreSinger - 0
genfasm command failing in VPR flow
#2963 opened by muthu-iisc - 1
Expand y_range Search for ymax
#2959 opened by amin1377 - 5
v9 release files missing from zip (was Error while Building CXX object vpr/CMakeFiles/libvpr.dir/src/server/gateio.cpp.o)
#2883 opened by PranavKumar1408 - 1
Document TitanNew benchmark suite
#2909 opened by vaughnbetz - 2
- 0
Improve NoC arch tag documentation, and add ability to use equations in NoC tags
#2948 opened by vaughnbetz - 0
Change default noc_biased_centroid_move weight
#2936 opened by vaughnbetz - 0
Parmys Failed to load architecture file
#2927 opened by huma4921 - 1
- 2
- 0
Document Hermes benchmark suite
#2908 opened by vaughnbetz - 0
remove : capacity attribute in tile
#2903 opened by markram1729 - 9
- 0
Missing documentation for --router_opt_choke_points
#2893 opened by vaughnbetz - 5
Unable to generate odin_ii
#2879 opened by aryan-1307 - 0
- 0
[Prepacker] Pack Molecule Data Structure Clarity
#2791 opened by AlexandreSinger - 1
Doxygen not building the VPR Grid doc properly
#2886 opened by vaughnbetz - 0
- 3
Potentially Wrong Golden Values For Some Tests
#2875 opened by AmirhosseinPoolad - 1
Faster check_non_configurable_edges
#2835 opened by vaughnbetz - 3
Documentation updates to remove a deprecated option (place_cost_exp) and add an undocumented one (place_constraint_expand)
#2864 opened by vaughnbetz - 3
[LibVTRUtil] Confusing API for vtr::rect
#2868 opened by AlexandreSinger - 3
Incorrect constant K-LUT primitive instantiation
#2842 opened by Junius00 - 1
Do nodes of timinggraph have spatial information?
#2853 opened by DuqingF - 1
- 0
The --fix_clusters option will result in conflicting locations during the placement stage.
#2847 opened by narutozxp - 1
v8.0 is broken on Latest machine
#2825 opened by markram1729 - 7
Placement delay lookup can not be readback
#2840 opened by tangxifan - 16
- 7
System Verilog support is broken due to compilation error in F4PGA plugin
#2821 opened by MohamedElgammal - 4
- 5
Wire lookahead runtime scales poorly with number of switch/segment types
#2811 opened by petergrossmann21 - 1
fix for ISO warning
#2818 opened by heshpdx - 0
Update benchmark page descriptions for VTR 9 release
#2810 opened by vaughnbetz - 0
SDC Parsing causes assertion error for specific netlist sweeping option combination
#2809 opened by petergrossmann21 - 1
`vtr_reg_nightly_test7/titan_other_run_flat` Failed
#2786 opened by ueqri - 0
- 4
- 2
- 0
Comparing performance/quality trade-off of SPEC and VTR random number generators.
#2798 opened by soheilshahrouz - 0
- 0
Optimize run time and memory footprint to build the choke point data structures in routing
#2782 opened by vaughnbetz - 12
- 0
- 0
- 0