A microcontroller encapsulation was made for the TRISC-16 CPU, including a 64 KB ROM and RAM memories, as well as peripherals and 16 I/O pins.
The TRISC architecture is currenctly in the TRISCv2 revision.
- TRISCv1: 14 simple instructions, including: Movimentation, load, store, logical and arithmetical.
- TRISCv2: 14 instructions added, including: Branch, Comparing, Shift, Rotate, Input, Output and Stack. GPIO and Counter peripherals added, as well as 16 I/O pins.
For more informations, see the latest revision datasheet.
- 16-bit RISC CPU with 16 I/O pins
- 28 Instructions
- GPIO
- Counter