/fpga

Primary LanguageVerilog

FPGA

Some activities regarding FPGA investigation

General

  1. Write HDL (e.g. Verilog)
  2. Synthesis (with yosys)
  3. Place and Route (with nextpnr)
  4. Package (e.g. with icepack)
  5. Upload (with iceprog)

Reference

Lattice

Usage of the iCEstick Evaluation Kit ICE40HX1K-STICK-EVN

TODOs

What are the next steps: [x] identify interesting FPGA vendors [ ] experiment with a selection of these vendors [ ] investigate HDLs like Verilog and VHDL [ ] investigate Open Source based FPGA toolchains