brsf11

Major in VLSI, interested in Computer Architecture & RISC-V

Apple Inc.Sol III

Pinned Repositories

ACArithmeticUnits
Some approximate computing arithmetic units
Language:Verilog12
AHB_Lite_Matrix
Language:SystemVerilog10
async_fifo
An parameterized asynchronous FIFO with full/empty afull/aempty signals. Tested with Verilator.
00
bfp
Beyond Floating Point - Posit C/C++ implementation
Language:C++00
brsf11.github.io
Language:CSS00
BuzzerMusicSoC
A Cortex-M0 based SoC
Language:Verilog10
Cores-VeeR-EH2
Language:SystemVerilog00
e902SoC
a course design work implemented with xuantie opene902
Language:Verilog2 1 01
mugen-riscv
Language:Shell8 1 116
Posit-FMAU
A multiple-precision vectorized fused multiply accumulate arithmetic unit for posit
Language:Verilog3 1 03

brsf11's Repositories

brsf11/mugen-riscv
Language:Shell8 1 116
brsf11/Posit-FMAU
A multiple-precision vectorized fused multiply accumulate arithmetic unit for posit
Language:Verilog3 1 03
brsf11/ACArithmeticUnits
Some approximate computing arithmetic units
Language:Verilog12
brsf11/AHB_Lite_Matrix
Language:SystemVerilog10
brsf11/async_fifo
An parameterized asynchronous FIFO with full/empty afull/aempty signals. Tested with Verilator.
00
brsf11/bfp
Beyond Floating Point - Posit C/C++ implementation
Language:C++00
brsf11/brsf11.github.io
Language:CSS00
brsf11/Cores-VeeR-EH2
Language:SystemVerilog00
brsf11/CTC-KWS-Pytorch
Language:Python00
brsf11/cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
Language:SystemVerilog0 0 00
brsf11/flexfloat
C library for the emulation of reduced-precision floating point types
Language:C0 0
brsf11/gem5
This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.
Language:C++0 0
brsf11/gpu-rodinia
Rodinia benchmark
Language:C
brsf11/HPC_01
Language:Cuda
brsf11/inflate-core
Language:Verilog
brsf11/LibRaw
LibRaw is a library for reading RAW files from digital cameras
Language:C++0 0
brsf11/Minos
A 4-stage-pipeline RV32I core written in verilog.
Language:Verilog1 0
brsf11/mugen-presentation
1
brsf11/mugen-riscv-deprecated
Language:Shell1
brsf11/qtrvsim
RISC-V CPU simulator for education purposes
Language:C++
brsf11/RealTank2023
Language:Verilog
brsf11/SDR_Pad
Language:Verilog1 0
brsf11/sig-core-t_functional
brsf11/snowman
Snowboy reimplementation
Language:C++0 0
brsf11/spandex-caches
Hardware Caches for Spandex Coherence Protocol
brsf11/sprite-compressor
An inflate-like algorithm software compressor
Language:C
brsf11/sprite-decompressor
An inflate-like algorithm hardware decompressor
Language:Verilog
brsf11/Tarsier-Internship
Language:Python2
brsf11/testing
brsf11/work-testing