brucehoult
Now at @kamihq working on a digital classroom site. Previously @sifive working on compilers, JITs, VMs, runtimes for @riscv, and before that Samsung R&D Russia.
Kerikeri, New Zealand
Pinned Repositories
arduino-6502ctl
Arduino 6502 Controller
avr-llvm
LLVM, AVR backend development branch
bdwgc
The Boehm-Demers-Weiser conservative C/C++ Garbage Collector (libgc, bdwgc, boehmgc)
binutils-gdb-dual-rvv
Work on dual RVV version handling assembler
riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
riscv-meta
RISC-V Meta – a suite of tools that operate on RISC-V ISA (Instruction Set Architecture)
rvv-examples-nibrunie
Example of RISC-V Vector programming
rvv_example
Simple demonstration of using the RISC-V Vector extension
SimpleVM
Sample code for Virtualization framework
trv
brucehoult's Repositories
brucehoult/SimpleVM
Sample code for Virtualization framework
brucehoult/riscv-meta
RISC-V Meta – a suite of tools that operate on RISC-V ISA (Instruction Set Architecture)
brucehoult/avr-llvm
LLVM, AVR backend development branch
brucehoult/bdwgc
The Boehm-Demers-Weiser conservative C/C++ Garbage Collector (libgc, bdwgc, boehmgc)
brucehoult/cinco
Port of Arduino environment for Freedom E 300 Dev Kit & HiFive Board
brucehoult/core_ddr3_controller
A DDR3 memory controller in Verilog for various FPGAs
brucehoult/core_dvi_framebuffer
Minimal DVI / HDMI Framebuffer
brucehoult/coreclr
This repo contains the .NET Core runtime, called CoreCLR, and the base library, called mscorlib. It includes the garbage collector, JIT compiler, base .NET data types and many low-level classes.
brucehoult/CursesSharp
Curses Sharp is a ncurses terminal control library binding for C#.
brucehoult/f32c
A 32-bit RISC-V / MIPS ISA retargetable CPU core
brucehoult/fpga_ffz
A crude simulation of an FPGA implementing a FindFirstZero function.
brucehoult/freedom-e-sdk
Open Source Software for Developing on the Freedom E Platform
brucehoult/GlideTrack
GlideTrack mobile tracker
brucehoult/ll_asm
linux_logo in 26+ kinds of assembly language
brucehoult/llvm
AVR backend for the LLVM project
brucehoult/llvm-project
All-in-one LLVM/Clang/Dragonegg &c subtree
brucehoult/lowrisc-riscv-llvm
RISC-V support for LLVM projects (LLVM, Clang, ...)
brucehoult/riscv-isa-manual
RISC-V Instruction Set Manual
brucehoult/riscv-llvm
old RISC-V LLVM from 2019
brucehoult/riscv-opcodes
RISC-V Opcodes
brucehoult/riscv32_lcc
brucehoult/slicer-config
slic3r config files for my DiamondMind 3D printer
brucehoult/smallz4
Optimal LZ4 compression
brucehoult/smhasher
Automatically exported from code.google.com/p/smhasher
brucehoult/u-boot
brucehoult/xbitmanip
RISC-V XBitmanip Extension