Document patching BBL to support sv32 MMU on riscv32
gktrk opened this issue · 2 comments
gktrk commented
Currently, there is no support for sv32 MMU in BBL. There's a Github issue here (riscv-software-src/riscv-pk#160) but no activity on it so far. Until then, BBL has to be patches like the following:
diff --git a/Makefile.in b/Makefile.in
index aeabdc2..f6b8c2f 100644
diff --git a/machine/fdt.c b/machine/fdt.c
index e8a504f..260fae8 100644
--- a/machine/fdt.c
+++ b/machine/fdt.c
@@ -646,8 +646,12 @@ static bool hart_filter_mask(const struct hart_filter *filter)
{
if (filter->mmu_type == NULL) return true;
if (strcmp(filter->status, "okay")) return true;
+#if __riscv_xlen == 32
+ if (!strcmp(filter->mmu_type, "riscv,sv32")) return false;
+#else
if (!strcmp(filter->mmu_type, "riscv,sv39")) return false;
if (!strcmp(filter->mmu_type, "riscv,sv48")) return false;
+#endif
printm("hart_filter_mask saw unknown hart type: status=\"%s\", mmu_type=\"%s\"\n",
filter->status, filter->mmu_type);
return true;
This needs to be documented somewhere and the issue needs to be resolved upstream.
gktrk commented
Patch submitted upstream: riscv-software-src/riscv-pk#177
gktrk commented
Closed by riscv-software-src/riscv-pk@b1bdf5b