risc-v

There are 2243 repositories under risc-v topic.

  • mytechnotalent/Reverse-Engineering

    A FREE comprehensive reverse engineering tutorial covering x86, x64, 32-bit/64-bit ARM, 8-bit AVR and 32-bit RISC-V architectures.

    Language:Assembly12.9k29201.2k

  • RT-Thread/rt-thread

    RT-Thread is an open source IoT Real-Time Operating System (RTOS). https://rt-thread.github.io/rt-thread/

    Language:C11.5k5231.7k5.3k

  • k2-fsa/sherpa-onnx

    Speech-to-text, text-to-speech, speaker diarization, speech enhancement, source separation, and VAD using next-gen Kaldi with onnxruntime without Internet connection. Support embedded systems, Android, iOS, HarmonyOS, Raspberry Pi, RISC-V, RK NPU, Ascend NPU, x86_64 servers, websocket server/client, support 12 programming languages

    Language:C++8.8k971.1k970

  • platformio/platformio-core

    Your Gateway to Embedded Software Development Excellence :alien:

    Language:Python8.7k1874.3k839

  • OpenXiangShan/XiangShan

    Open-source high-performance RISC-V processor

    Language:Scala6.7k94596831

  • tock/tock

    A secure embedded operating system for microcontrollers

    Language:Rust6.1k115743781
  • DietPi

    MichaIng/DietPi

    Lightweight justice for your single-board computer!

    Language:Shell5.6k1505.5k532

  • alibaba/AliOS-Things

    面向IoT领域的、高可伸缩的物联网操作系统，可去官网了解更多信息https://www.aliyun.com/product/aliosthings

    Language:C4.6k3759161.2k

  • chyyuu/os_kernel_lab

    OS kernel labs based on Rust/C Lang & RISC-V 64/X86-32

    Language:Rust4k219421.9k

  • misprit7/computerraria

    A fully compliant RISC-V computer made inside the game Terraria

    Language:Rust3.7k19450
  • Ripes

    mortbopet/Ripes

    A graphical processor simulator and assembly editor for the RISC-V ISA

    Language:C++3.1k43232319

  • SI-RISCV/e200_opensource

    Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

    Language:Verilog2.8k229431k

  • openhwgroup/cva6

    The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

    Language:Assembly2.7k901.2k846
  • arduino-pico

    earlephilhower/arduino-pico

    Raspberry Pi Pico Arduino core, for all RP2040 and RP2350 boards

    Language:C2.6k601.2k508

  • limine-bootloader/limine

    Modern, advanced, portable, multiprotocol bootloader and boot manager. (Official mirror of https://codeberg.org/Limine/Limine)

    Language:C2.6k28262173

  • darklife/darkriscv

    opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

    Language:Verilog2.4k9045318

  • uxmal/reko

    Reko is a binary decompiler.

    Language:C#2.3k73642266

  • gem5/gem5

    The official repository for the gem5 computer-system architecture simulator.

    Language:C++2.3k735001.6k

  • renode/renode

    Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems

    Language:RobotFramework2.1k69746377

  • ucb-bar/chipyard

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

    Language:Scala2k89712780

  • risc0/risc0

    RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.

    Language:C++2k47602659

  • larsbrinkhoff/awesome-cpus

    All CPU and MCU documentation in one place

    Language:HTML2k9915187

  • rcore-os/rCore-Tutorial-v3

    Let's write an OS which can run on RISC-V in Rust from scratch!

    Language:Rust1.9k2186535
  • neorv32

    stnolting/neorv32

    🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

    Language:VHDL1.9k51265291

  • kfrlib/kfr

    Fast, modern C++ DSP framework, FFT, Sample Rate Conversion, FIR/IIR/Biquad Filters (SSE, AVX, AVX-512, ARM NEON, RISC-V RVV)

    Language:C++1.8k62211262
  • serv

    olofk/serv

    SERV - The SErial RISC-V CPU

    Language:Verilog1.7k4166231

  • lowRISC/ibex

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

    Language:SystemVerilog1.7k100876660

  • riscv-mcu/e203_hbirdv2

    The Ultra-Low Power RISC-V Core

    Language:Verilog1.6k3421396

  • ultraembedded/riscv

    RISC-V CPU Core (RV32IM)

    Language:Verilog1.6k4919272
  • simdutf

    simdutf/simdutf

    Unicode routines (UTF8, UTF16, UTF32) and Base64: billions of characters per second using SSE2, AVX2, NEON, AVX-512, RISC-V Vector Extension, LoongArch64, POWER. Part of Node.js, WebKit/Safari, Ladybird, Chromium, Cloudflare Workers and Bun.

    Language:C++1.6k22293102

  • TheThirdOne/rars

    RARS -- RISC-V Assembler and Runtime Simulator

    Language:Java1.4k25158285

  • rcore-os/rCore-Tutorial-Book-v3

    A book about how to write OS kernels in Rust easily.

    Language:Python1.3k14131255
  • shecc

    sysprog21/shecc

    A self-hosting and educational C optimizing compiler

    Language:C1.3k2790147

  • chili-chips-ba/wireguard-fpga

    Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!

    Language:Verilog1.3k251827
  • RVVM

    LekKit/RVVM

    The RISC-V Virtual Machine

    Language:C1.1k218282

  • ultraembedded/biriscv

    32-bit Superscalar RISC-V CPU

    Language:Verilog1.1k3225195