ucb-bar/chipyard

Issues

• Failed to ./build-setup.sh at conda setup VerificationError on open_pdk packages.

  #2147 opened 16 days ago by trustfarm-dev
  1

• Question about Transmitting an executable binary to FPGA via Serial port

  #2151 opened 10 days ago by yueca
  0

• Error while running the coremark on largeBoomcore in chipyard

  #1989 opened 4 months ago by waseem-10xe
  1

• NVDLA cannot read cache data correctly

  #2137 opened 23 days ago by franktaTian
  2

• Scala SBT Version Binary Compatibility Error

  #2126 opened 15 days ago by suhwanhong999
  2

• ./build-setup.sh failed with the version 1.13.0 (1.11.0 works)

  #2116 opened a month ago by ksungkeun84
  2

• basic design fail to meet timing and a really slow booting linux on VCU118

  #2119 opened a month ago by Charles-Tang
  5

• ./build-setup.sh riscv-tools error

  #2065 opened 3 months ago by RockyQLuo
  6

• Error: Failed to make rmapats.so

  #2091 opened 2 months ago by RockyQLuo
  2

• Cannot boot linux with RocketChip+Vector Config

  #2103 opened 2 months ago by franktaTian
  11

• Error Generating Bitstream for VCU118 with RocketVCU118Config

  #2118 opened a month ago by yasnakateb
  2

• How to configure asynchronous reset

  #2098 opened 2 months ago by AD738560581
  5

• i want to build a customed SOC bitstream in chipyard /FPGA

  #2102 opened 2 months ago by cinder023
  3

• make run-binary differs from make run-binary-debug

  #2089 opened 2 months ago by HazemAlindari
  1

• Numpy-1.26.4-cp310-cp310-manylinux_2_17_x86_64.manylinux2014_x86_64.whl is not a supported wheel on this platform

  #2080 opened 2 months ago by ZechenM
  0

• FireSim doesn't work with cloned configs + CloneLazyModule caveats

  #2076 opened 2 months ago by abejgonzalez
  1

• Add documentation for required dependencies and fix build-setup.sh issues

  #2073 opened 3 months ago by StephenMoreOSU
  0

• firesim debug：using config (Rocket chip+custom Axi4 Peripheral) on fpga, segmentation faullt occurs when accessing Specific peripheral address

  #2062 opened 3 months ago by huchensong
  0

• Sky130 + openroad documentation doesn't work

  #2059 opened 3 months ago by arunlee77
  0

• The current default IOBinder for Debug Module does not punch out the ndreset (and hartResetReq)?

  #2048 opened 3 months ago by DecodeTheEncoded
  4

• How to export my custom IO signals at RocketTile module to DigitalTop's IO?

  #2046 opened 3 months ago by csgxiong
  2

• Add README to tests directory

  #2049 opened 3 months ago by jerryz123
  0

• the data writing to SIMDRAM is always 0

  #2047 opened 3 months ago by xlgforever
  4

• Simulation of pmp.riscv does not output instruction and cycle counts.

  #2050 opened 3 months ago by TianningGao
  1

• RoCC Punch Trough Signal

  #1987 opened 4 months ago by eric900115
  6

• Error while executing "make buildfile CONFIG=GemminiRocketConfig tutorial=sky130-openroad"

  #2035 opened 3 months ago by chihyu-box
  2

• How to Add a prefix at every module name when generating system verilog?

  #2033 opened 4 months ago by csgxiong
  1

• The ibus should have configurable crossing scheme to PLIC.

  #2010 opened 4 months ago by DecodeTheEncoded
  2

• Build-setup issue

  #2016 opened 4 months ago by alsrbok
  4

• build-setup.sh $(which conda) returns function

  #2002 opened 4 months ago by allpan3
  1

• VLSI Flow broken for OpenRoad+Sky130 on chipyard 1.11.0 or above?

  #2017 opened 4 months ago by Jerry-Tianchen
  0

• Tutorial for sky130+openroad vlsi fails due to unbounded memory usage

  #1934 opened 5 months ago by TheMichaelGionet
  2

• cospike_cosim not checking wdata for validity

  #2011 opened 4 months ago by pointerliu
  3

• Verilator simulations can be made an order of magnitude faster

  #2000 opened 4 months ago by mayyxeng
  3

• How to use JTAGDebugBScanOverlayKey in a Rocketchip configuration deployed on FPGA board

  #1982 opened 4 months ago by leduchuybk
  0

• ASAP7 + OpenRoad. ERROR: Can't open ABC output file.

  #1936 opened 5 months ago by exhaust-create
  3

• Program runs extremely slow on VCU118 for larger testcases

  #1992 opened 4 months ago by Nerotos
  0

• Can not boot linux on Shutle

  #1986 opened 4 months ago by franktaTian
  4

• Error while executing the command " ./build-setup.sh "

  #1975 opened 4 months ago by waseem-10xe
  2

• User field of TL Channels does not work (No connection for user fields in Xbar)

  #1888 opened 4 months ago by ksungkeun84
  4

• How can I access an AXI MMIO slave on the sbus in the NoC?

  #1974 opened 4 months ago by eric900115
  1

• Verilator simulation (RocketConfig default example) crashes on MacOS

  #1886 opened 7 months ago by Frank-Zeyda
  4

• Chipyard1.110 version, vcs make failed

  #1922 opened 5 months ago by YeyeQian
  2

• Is the data in the inclusive L2 cache synchronized with the data in the DDR, or how can I enable the write-through function of the L2 cache?

  #1915 opened 5 months ago by Yuxin-Yu
  5

• Problems when running "make buildfile tutorial=sky130-openroad"

  #1918 opened 5 months ago by exhaust-create
  1

• Segfault running SimNetwork under verilator

  #1885 opened 7 months ago by sethp
  11

• Facing issue while loading bare metal elf file through gdb debugger with openocd + gdb over virtual Jtag setup on actual fpga emulator on RISCV soc.

  #1901 opened 6 months ago by tushar1277
  1

• Torture Test is failing after removing the Floating Point Unit

  #1887 opened 7 months ago by ashu-bitspilani
  2

• Bare Metal VCU118 capability (similar to Arty100T) and Update to VCU118 documentation

  #1889 opened 7 months ago by BMorgan1296
  4

• How can we integrate riscv-dv to test boom core?

  #1879 opened 7 months ago by Sai-Manish
  1