soc
There are 522 repositories under soc topic.
ihebski/DefaultCreds-cheat-sheet
One place for all the default credentials to assist the Blue/Red teamers identifying devices with default password 🛡️
SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
ucb-bar/chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
deepfence/PacketStreamer
:star: :star: Distributed tcpdump for cloud native environments :star: :star:
stnolting/neorv32
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
riscv-mcu/e203_hbirdv2
The Ultra-Low Power RISC-V Core
cyb3rxp/awesome-soc
A collection of sources of documentation, as well as field best practices, to build/run a SOC
TheresAFewConors/Sooty
The SOC Analysts all-in-one CLI tool to automate and speed up workflow.
mthcht/awesome-lists
Awesome Security lists for SOC/CERT/CTI
splinedrive/kianRiscV
RISC-V XV6/Linux SoC, marchID: 0x2b
xboot/xboot
The extensible bootloader for embedded system with application engine, write once, run everywhere.
satan1a/TheRoadOfSO
学习安全运营的记录 | The knowledge base of security operation
securityjoes/MasterParser
MasterParser is a powerful DFIR tool designed for analyzing and parsing Linux logs
tenzir/tenzir
Tenzir is the data pipeline engine for security teams.
sergeykhbr/riscv_vhdl
Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
TonyPhipps/SIEM
SIEM Tactics, Techiques, and Procedures
0x783kb/Security-Operation-Book
常见的攻击行为监测特征及方法，涵盖端点和流量，未包含PowerShell和Sysmon。预祝运营生活愉快！
mthcht/ThreatHunting-Keywords
Awesome list of keywords and artifacts for Threat Hunting sessions
mir1ce/Hawkeye
Windows应急响应工具---Hawkeye(鹰眼)。集Windows日志分析，进程扫描，主机信息于一体的综合应急响应分析工具
Xilinx/Vitis_Accel_Examples
Vitis_Accel_Examples
TonyPhipps/Meerkat
A collection of PowerShell modules designed for artifact gathering and reconnaisance of Windows-based endpoints.
rggen/rggen
Code generation tool for control and status registers
WangXuan95/USTC-RVSoC
An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V SoC，包含一个RV32I CPU、一个简单可扩展的总线、一些外设。
utmstack/UTMStack
Enterprise-ready SIEM, SOAR and Compliance powered by real-time correlation and threat intelligence.
Staok/ARM-Linux-Study
ARM Linux 的学习历程。包括应用、驱动、设备树，GCC, Make, CMake, Bash, Vim, Git 等等大集合内容。文章遵守 CC BY NC SA 4.0 协议。
eshlomo1/Microsoft-Sentinel-SecOps
Microsoft Sentinel SOC Operations
strath-sdr/RFSoC-Book
Companion Jupyter Notebooks for the RFSoC-Book.
ucb-bar/constellation
A Chisel RTL generator for network-on-chip interconnects
stnolting/neo430
:computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
TimeBreeze/Tritium
最大化CPU的潜力 Maximize the potential of CPU
mthcht/Purpleteam
Purpleteam scripts simulation & Detection - trigger events for SOC detections
agra-uni-bremen/riscv-vp
RISC-V Virtual Prototype
Patrowl/PatrowlHears
PatrowlHears - Vulnerability Intelligence Center / Exploits
SpinalHDL/SaxonSoc
SoC based on VexRiscv and ICE40 UP5K
securityjoes/ForensicMiner
A really good DFIR automation for collecting and analyzing evidence designed for cybersecurity professionals.
ui-model/ui-model
UI Model major repository