Issues
- 2
- 0
- 1
Support Pkl format
#202 opened by taichi-ishitani - 0
PyUVM support
#203 opened by taichi-ishitani - 0
Parameterized bit field with
#201 opened by taichi-ishitani - 0
Veryl support
#199 opened by taichi-ishitani - 3
- 15
[Request] Add support for library name
#196 opened by SzymonHitachi - 1
[VHDL] Type mismatch error for an array register with offset address 0x0
#197 opened by taichi-ishitani - 0
[VHDL] Array port
#195 opened by taichi-ishitani - 0
Specify reset domain
#193 opened by taichi-ishitani - 1
backdoor read has no side effect
#191 opened by taichi-ishitani - 4
Implement: Parameter-Driven Bit width assignment in SV/Verilog files from input file formats
#190 opened by pratheekjain - 0
Drop XLS support
#188 opened by taichi-ishitani - 0
- 0
Redefine rws bit field type
#184 opened by taichi-ishitani - 0
Change loader priority
#185 opened by taichi-ishitani - 0
Update copyright year
#186 opened by taichi-ishitani - 1
- 0
Generate IP-XACT
#182 opened by taichi-ishitani - 1
Update option description
#180 opened by taichi-ishitani - 0
Update spreadbase gem
#181 opened by taichi-ishitani - 0
Stop using sonarcloud
#178 opened by taichi-ishitani - 0
- 2
REGISTER_INDEX
#176 opened by haridevang - 0
- 0
Modify existing features
#170 opened by taichi-ishitani - 0
Update development gems
#172 opened by taichi-ishitani - 4
Error while starting the uvm_reg_mem_hdl_paths_seq.
#169 opened by Tejoyadav - 1
- 7
Support SPI as bus interface
#166 opened by hpretl - 1
Provide Python bindings
#167 opened by hpretl - 0
Add RW register type
#155 opened by taichi-ishitani - 2
separating HW and SW access
#163 opened by imerkado91 - 0
- 1
Add 'strobe_width' field
#160 opened by taichi-ishitani - 0
- 1
Add W1S/W1C access types
#157 opened by taichi-ishitani - 2
block_0.xlsx can't change register name
#159 opened by jamesningd - 6
Vivado Doesn't like this systemverilog code
#158 opened by megeed - 0
Typo
#156 opened by taichi-ishitani - 1
Check reserved words
#154 opened by taichi-ishitani - 1
SVD support
#153 opened by taichi-ishitani - 1
Create Docker image
#152 opened by taichi-ishitani - 0
- 3
Fix warnings reported by Verilator
#150 opened by taichi-ishitani - 3
Constants and expressions support
#149 opened by m-kru - 5
Enumeration types support
#146 opened by m-kru - 1
Addressing mode support
#147 opened by m-kru - 1
External memory support
#148 opened by m-kru