vhdl
There are 2744 repositories under vhdl topic.
logisim-evolution/logisim-evolution
Digital logic design tool and simulator
SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
ghdl/ghdl
VHDL 2008/93/87 simulator
cocotb/cocotb
cocotb: Python-based chip (RTL) verification
stnolting/neorv32
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
SpinalHDL/SpinalHDL
Scala based HDL
clash-lang/clash-compiler
Haskell to VHDL/Verilog/SystemVerilog compiler
olofk/fusesoc
Package manager and build abstraction tool for FPGA/ASIC development
drom/awesome-hdl
Hardware Description Languages
VUnit/vunit
VUnit is a unit testing framework for VHDL/SystemVerilog
open-sdr/openwifi-hw
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware
nickg/nvc
VHDL compiler and simulator
olofk/edalize
An abstraction library for interfacing EDA tools
antonblanchard/microwatt
A tiny Open POWER ISA softcore written in VHDL 2008
JulianKemmerer/PipelineC
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
sergeykhbr/riscv_vhdl
Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
TerosTechnology/vscode-terosHDL
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
VLSI-EDA/PoC
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
ben-marshall/awesome-open-hardware-verification
A List of Free and Open Source Hardware Verification Tools and Frameworks
jofrfu/tinyTPU
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
Nuand/bladeRF-wiphy
bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem
VHDL-LS/rust_hdl
A fast VHDL language server and analysis library written in Rust
rggen/rggen
Code generation tool for control and status registers
slaclab/surf
A huge VHDL library for FPGA and digital ASIC development
howerj/forth-cpu
A Forth CPU and System on a Chip, based on the J1, written in VHDL
Nic30/hdlConvertor
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
skordal/potato
A simple RISC-V processor for use in FPGA designs.
DegateCommunity/Degate
A modern and open-source cross-platform software for chips reverse engineering.
OSVVM/OSVVM
OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...
jeremiah-c-leary/vhdl-style-guide
Style guide enforcement for VHDL
suoto/hdl_checker
Repurposing existing HDL tools to help writing better code
Nic30/hwt
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
Gowtham1729/Image-Processing
Image Processing Toolbox in Verilog using Basys3 FPGA
stnolting/neo430
:computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
kevinpt/symbolator
HDL symbol generator
apertus-open-source-cinema/axiom-firmware
AXIOM firmware (linux image, gateware and software tools)