taichi-ishitani

@pezy-computingKanagawa, Japan

Pinned Repositories

flgen
Filelist generator
Language:Ruby15 3 190
pzbcm
Basic Common Modules
Language:SystemVerilog35 4 85
rggen
Code generation tool for control and status registers
Language:Ruby343 14 15844
rb_json5
JSON5 parser for Ruby
Language:Ruby16 4 00
rice
Language:SystemVerilog7 2 02
rupkl
Pkl parser for Ruby
Language:Ruby21 5 00
tnoc
Network on Chip Implementation written in SytemVerilog
Language:SystemVerilog161 13 4044
tue
Useful UVM extensions
Language:SystemVerilog20 4 65
tvip-apb
Verification IP for AMBA APB Protocol
Language:SystemVerilog27 3 56
tvip-axi
AMBA AXI VIP
Language:SystemVerilog366 16 40106

taichi-ishitani's Repositories

taichi-ishitani/tvip-axi
AMBA AXI VIP
Language:SystemVerilog366 16 40106
taichi-ishitani/tnoc
Network on Chip Implementation written in SytemVerilog
Language:SystemVerilog161 13 4044
taichi-ishitani/tvip-apb
Verification IP for AMBA APB Protocol
Language:SystemVerilog27 3 56
taichi-ishitani/rupkl
Pkl parser for Ruby
Language:Ruby21 5 00
taichi-ishitani/tue
Useful UVM extensions
Language:SystemVerilog20 4 65
taichi-ishitani/rb_json5
JSON5 parser for Ruby
Language:Ruby16 4 00
taichi-ishitani/tvip-common
Language:SystemVerilog11 4 25
taichi-ishitani/tbcm
Basic Common Modules
Language:SystemVerilog9 4 01
taichi-ishitani/rice
Language:SystemVerilog7 2 02
taichi-ishitani/pzbcm_veryl
pzbcm written in veryl
3 2 0
taichi-ishitani/stdgems-version
Language:Ruby3 3 0
taichi-ishitani/sv-tests
Test suite designed to check compliance with the SystemVerilog standard.
Language:SystemVerilog3 1 01
taichi-ishitani/systemrdl
Language:Ruby2 3 0
taichi-ishitani/awesome
A curated list of awesome resources for HDL design and verification
Language:Shell1
taichi-ishitani/bch
Language:SystemVerilog1 2 0
taichi-ishitani/rtl_with_di
RTL で依存性の注入（っぽいこと）をする
Language:SystemVerilog1 3 0
taichi-ishitani/systemrdl-old
Language:Ruby1 3 0
taichi-ishitani/cosim-arch-checker
Framework to perform DUT vs ISS (Whisper) lockstep architectural checks
Language:C1 0
taichi-ishitani/doc
Documents of Veryl Hardware Description Language
Language:JavaScript1 0
taichi-ishitani/docile
Docile keeps your Ruby DSLs tame and well-behaved
Language:Ruby2 0
taichi-ishitani/hdl-advent-calender-2022
HD Advent Calender 2022
Language:SystemVerilog2 0
taichi-ishitani/Konata
Konata is an instruction pipeline visualizer for Onikiri2-Kanata/Gem5-O3PipeView formats. You can download the pre-built binaries from https://github.com/shioyadan/Konata/releases
Language:JavaScript1 0
taichi-ishitani/lzss
Language:Verilog2 0
taichi-ishitani/parslet
A small PEG based parser library. See the Hacking page in the Wiki as well.
Language:Ruby1 0
taichi-ishitani/rggen-spi
RgGen plugin for SPI support
Language:HTML2 0
taichi-ishitani/rubyzip
Official Rubyzip repository
Language:Ruby2 0
taichi-ishitani/spreadbase
Ruby library for accessing (R/W) OpenOffice/LibreOffice spreadsheets (ods)... because Excel IS a database!!
Language:Ruby2 0
taichi-ishitani/veryl
Veryl: A Modern Hardware Description Language
Language:Rust1 0
taichi-ishitani/veryl-lang.org
Language:HTML0 0
taichi-ishitani/veryl-sample