chipyard

There are 9 repositories under chipyard topic.

ucb-bar/chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Language:Scala1.5k 86 635604
firesim/FireMarshal
Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.
Language:Python70 25 7948
mit-ll/CEP
The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.
Language:C59 18 1520
MaxXSoft/Bossa
BOOM's Simulation Accelerator.
Language:Scala11 3 01
ThePituLegend/RISC-V_DE10-Nano
This project aims to boot Linux on a RocektChip based SoC, synthesised on the DE10-Nano board. Computer Science Bachelor's Thesis at UAB, Spain.
Language:Verilog8 2 02
RedFlag2017/rocket-soc-tb
A systemverilog/UVM/Makefile testbench for Rocket RISC-V SoCs
Language:Verilog7 0 03
Fleker/chipyard-viewer
An online viewer for Chipyard output files
Language:TypeScript5 2 222
Kian75/Chisel_Examples
Language:Scala10
slatte01/ELEC-H505_Basic-RISC-V-in-order-core-accelerators-and-simple-SoC-generation-ChipYard-
This Github repository serves as a User Guide (UG) for new Chipyard users.
Language:Python1 1 00