chipsalliance/Cores-VeeR-EH1

Issues

• Has the maintenance of this repository been stopped?

  #123 opened 10 months ago by zhangkanqi
  1

• extension `zicsr' required

  #125 opened 5 months ago by ahmdotm
  0

• tcl file

  #124 opened 5 months ago by ahmdotm
  0

• Instruction after pmpaddr0 csr write was not executed

  #122 opened a year ago by Ankelih
  7

• Not generate waveform when using vcs to test Hello World.

  #121 opened a year ago by zhangkanqi
  2

• coremark/dhrystone testing can't get 4.9 CM/MHz with rtl simulation or in FPGA

  #120 opened a year ago by chithize
  0

• The new feature of verilator stops building procession

  #118 opened 2 years ago by LoveMyPillow
  2

• OpenOCD download to ICCM/DCCM failed.

  #117 opened 2 years ago by cocckkimo
  1

• Blocking Loads/DMA disable

  #116 opened 2 years ago by omezrich
  0

• Repo renaming

  #115 opened 2 years ago by olofk
  2

• Coremark for new extension

  #114 opened 2 years ago by HamzaShabbir517
  0

• facing issues when C code size goes beyond 8KB

  #111 opened 2 years ago by yash-agnisys
  1

• Question about pipeline FF enable signals

  #110 opened 2 years ago by tunefish777
  0

• Fusesoc's sim target is deprecated

  #108 opened 3 years ago by RRozak
  10

• GHR refresh

  #107 opened 3 years ago by Zissi-Lei
  1

• Formal Verification of SweRV EH1 using riscv-formal

  #95 opened 3 years ago by ShashankVM
  0

• CoreMark test score

  #104 opened 3 years ago by Zissi-Lei
  2

• Usage scenarios of different DFFs

  #106 opened 3 years ago by Zissi-Lei
  0

• Unable to replicate performance improvement achieved by using different target values

  #105 opened 3 years ago by samfishman1
  1

• Try running multi thread program on swerv EH1 core

  #103 opened 3 years ago by rajat-agnisys
  2

• openocd timeout occurs when trying to load elf file using command 'load_image'.

  #102 opened 3 years ago by nikhill-agnisys
  7

• fpga_optimize cannot be set to 0 in swerv_config

  #100 opened 3 years ago by jlucnagel
  1

• slip in dec_decode_ctrl

  #99 opened 3 years ago by kuangxin
  0

• Timing violations with Vivado

  #98 opened 3 years ago by Rusty-Wire
  4

• $readmem file address beyond bounds of array

  #97 opened 3 years ago by HamzaShabbir517
  8

• GCC version in Makefile

  #96 opened 4 years ago by qian-gu
  4

• cmark_dccm fails to build

  #92 opened 4 years ago by danielmlynek
  3

• tlu_flush_path_e4

  #90 opened 4 years ago by kingstone1927
  7

• Set default mrac value with swerv.config

  #84 opened 4 years ago by olofk
  1

• Can I integrate the Cores-SweRV on Zedboard fpga?

  #80 opened 4 years ago by kingstone1927
  1

• Macro definitions not being found

  #81 opened 4 years ago by rlb1116
  2

• dccm initialization

  #71 opened 4 years ago by S-Nomii
  3

• $readmem file address beyond bounds of array

  #63 opened 4 years ago by cebaut
  6

• The CSR mepc cann't save correct mret address after Continuous NMI happened

  #72 opened 4 years ago by Richard2088
  23

• NMI HELP

  #77 opened 4 years ago by Richard2088
  1

• print instruction to exec.log

  #87 opened 4 years ago by kingstone1927
  2

• which unit control flushing of the pipelines?

  #88 opened 4 years ago by kingstone1927
  3

• No tags for releases

  #91 opened 4 years ago by robtaylor
  5

• How can I debug using Verilator and gdb

  #83 opened 4 years ago by kingstone1927
  6

• Stall point

  #86 opened 4 years ago by kingstone1927
  5

• Delay after fetching instructions when not using icache

  #85 opened 4 years ago by crazy-catlady
  4

• question about adding custom instructions

  #79 opened 4 years ago by feiger313
  2

• Speculative load observed on LSU AXI

  #78 opened 4 years ago by pieter3d
  10

• mcontrol chain bit not WARL on triggers 1 & 3

  #74 opened 4 years ago by wronkiew-ghs
  3

• typo in swerv.config

  #70 opened 4 years ago by sobuch
  4

• pic

  #73 opened 4 years ago by S-Nomii
  5

• Which signal should I choose to trace Load/Store/pipeline state

  #67 opened 4 years ago by ymlei
  1

• Cores-SweRV development planning

  #69 opened 4 years ago by zhuzhizhan
  8

• Erasing pending bits for interrupts

  #65 opened 4 years ago by albertodbg
  25

• Determine size of i-cache

  #66 opened 4 years ago by wronkiew-ghs
  2