budude2

Pinned Repositories

ADC_Test
AD 9681 Evaluation Board Test Design
Language:VHDL0 3 00
AdvSciComp_proj
Language:C++0 3 00
C64_MiSTer_Pocket
Language:SystemVerilog20
g_stuff
My GEMPAK Stuff
Language:Shell00
goestools
Tools to work with signals and files from GOES satellites
Language:C++0 2 00
jtdx
JTDX
Language:C++0 2 00
mpplabs
Merge a folder of photos using CUDA
Language:C++00
nested-lookup
Python functions for working with deeply nested documents (lists and dicts)
Language:Python00
openfpga-AtariLynx
Language:VHDL14 2 51
openfpga-GBC
Language:Verilog231 17 609

budude2's Repositories

budude2/openfpga-GBC
Language:Verilog231 17 609
budude2/C64_MiSTer_Pocket
Language:SystemVerilog20
budude2/ADC_Test
AD 9681 Evaluation Board Test Design
Language:VHDL0 3 00
budude2/AdvSciComp_proj
Language:C++0 3 00
budude2/g_stuff
My GEMPAK Stuff
Language:Shell00
budude2/goestools
Tools to work with signals and files from GOES satellites
Language:C++0 2 00
budude2/jtdx
JTDX
Language:C++0 2 00
budude2/mpplabs
Merge a folder of photos using CUDA
Language:C++00
budude2/nested-lookup
Python functions for working with deeply nested documents (lists and dicts)
Language:Python00
budude2/Parking-Lot-Problem
Language:SystemVerilog00
budude2/project_euler
Project Euler Problems
budude2/Py13
A port of the original plan 13 algorithm to Python (WIP)
Language:Python3 0
budude2/sdrpp_bladeRF
bladeRF source module for sdr++
Language:C++1
budude2/SoC_FPGA
SoC FPGA Assignments Repo
Language:VHDL
budude2/Starduster-II
Repository for Starduster II programs, schematics, and data.
Language:C++
budude2/stardusterIII
Language:Python
budude2/VGA-Controller
A VGA Controller Implemented in SVA
Language:VHDL