register accesses for Implicit operands
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junghee commented
./cstool/cstool -d x64 55
0 55 push rbp
ID: 609 (push)
Prefix:0x00 0x00 0x00 0x00
Opcode:0x55 0x00 0x00 0x00
rex: 0x0
addr_size: 8
modrm: 0x0
disp: 0x0
sib: 0x0
op_count: 1
operands[0].type: REG = rbp
operands[0].size: 8
operands[0].access: READ
Registers read: rsp rbp
Registers modified: rsp
Groups: mode64
Capstone produces the right set of register reads/writes for push instructions where rsp
is an implicit operand.
Whereas, for a fadd
instruction with an implicit register st(0)
,
fadd st(1)
(the semantics is ST(0) <- ST(0) + ST(1)), capstone produces the following:
./cstool/cstool -d x64 d8c1
0 d8 c1 fadd st(1)
ID: 15 (fadd)
Prefix:0x00 0x00 0x00 0x00
Opcode:0xd8 0x00 0x00 0x00
rex: 0x0
addr_size: 8
modrm: 0xc1
disp: 0x0
sib: 0x0
op_count: 1
operands[0].type: REG = st(1)
operands[0].size: 10
operands[0].access: READ
Registers read: st(1)
FPU_FLAGS: MOD_C1 UNDEF_C0 UNDEF_C2 UNDEF_C3
Groups: fpu
It does not include st(0) as a register read, and no register write.
Update:
I think the problem is that capstone does not have X86_INS_FADDP.
So, I'm not sure how to distinguish fadd st(1)
from faddp st(1)
.